{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SN74AUP1G32DSF2","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"SN74AUP1G32DSF2","canonicalUrl":"https://icboms.com/texas-instruments/SN74AUP1G32DSF2","factsUrl":"https://icboms.com/api/mcp/products/SN74AUP1G32DSF2","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments 74AUP series SN74AUP1G32DSF2 single 2-input OR gate, 0.8V–3.6V supply, 500 nA quiescent, 4 mA output drive, 6.4 ns propagation delay at 3.3V/30pF, -40°C to 85°C, 6-XFDFN package.","salesMarkdown":"## Single OR gate for the tightest power budgets The Texas Instruments SN74AUP1G32DSF2 is a single 2-input OR gate from the 74AUP series, the industry's lowest-power logic family. It operates from 0.8V to 3.6V, making it a direct fit for battery-powered and multi-voltage designs where a standard 3.3V OR gate would draw too much idle current. The 500 nA maximum quiescent current means this gate can sit on a sensor interrupt line or a power-good combiner without draining the battery during sleep. ## 6.4 ns propagation delay — what it buys the bus With a maximum propagation delay of 6.4 ns at 3.3V into a 30 pF load, this gate keeps combinatorial paths tight enough for most low-frequency control and status signals. It will not limit a 48 MHz SPI chip-select or a 1 MHz PWM enable. At lower supply voltages the delay increases, so if you are running the gate at 1.2V, budget closer to 20 ns — the datasheet curve is worth a look before signing off timing closure. ## Package and footprint: 6-XFDFN (1 mm × 1 mm) Housed in a 6-XFDFN package (supplier device package 6-SON, 1 mm × 1 mm), this part is surface-mount only. ## Temperature grade and environment Rated for -40°C to 85°C, this gate suits outdoor telecom enclosures, factory-floor I/O modules, and automotive cabin-zone logic where the ambient stays below 85°C. Not qualified to AEC-Q100, so for under-hood or extended-temperature applications, look at the AUP family's automotive-grade siblings. ## Lifecycle and sourcing reality The SN74AUP1G32DSF2 is listed as Active with ROHS3 compliance.","metaTitle":"SN74AUP1G32DSF2 OR Gate, 0.8V–3.6V, 6.4ns @ 3.3V","metaDescription":"TI SN74AUP1G32DSF2 single 2-input OR gate in 6-XFDFN. 0.8V–3.6V supply, 500 nA quiescent, 6.4 ns prop delay at 3.3V. Active, ROHS3.","metaKeywords":null},"attributes":{"series":"74AUP","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"Series":"74AUP","Package":"Tape & Reel (TR); Cut Tape (CT)","Logic Type":"OR Gate","Mounting Type":"Surface Mount","Package / Case":"6-XFDFN","lifecycle_stage":"eol_hot","Number of Inputs":"2","Voltage - Supply":"0.8V ~ 3.6V","Number of Circuits":"1","Operating Temperature":"-40°C ~ 85°C","Input Logic Level - Low":"0.7V ~ 0.9V","Supplier Device Package":"6-SON (1x1)","Input Logic Level - High":"1.6V ~ 2V","Current - Quiescent (Max)":"500 nA","Current - Output High, Low":"4mA, 4mA","Max Propagation Delay @ V, Max CL":"6.4ns @ 3.3V, 30pF"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$0.6","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$0.60000","currency":"USD"},{"qty":10,"price":"$0.53200","currency":"USD"},{"qty":25,"price":"$0.49960","currency":"USD"},{"qty":100,"price":"$0.40760","currency":"USD"},{"qty":250,"price":"$0.37864","currency":"USD"},{"qty":500,"price":"$0.32224","currency":"USD"},{"qty":1000,"price":"$0.25779","currency":"USD"},{"qty":2500,"price":"$0.23362","currency":"USD"},{"qty":5000,"price":"$0.21979","currency":"USD"},{"qty":10000,"price":"$0.21450","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/7d2c7e9e20179a735e2bed5876c0b38f.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the propagation delay for SN74AUP1G32DSF2 at 1.8V?","answer":"The evidence does not list a propagation delay at 1.8V. At 3.3V with a 30 pF load the maximum is 6.4 ns. For lower supply voltages, the datasheet provides typical curves — the delay increases as supply drops."},{"question":"Does SN74AUP1G32DSF2 have internal pull-up resistors?","answer":"No. The SN74AUP1G32DSF2 is a standard CMOS OR gate with no internal pull-up or pull-down resistors on its inputs. Unused inputs must be tied to VCC or GND externally to prevent floating nodes and excess quiescent current."},{"question":"What is the difference between SN74AUP1G32DSF2 and SN74LVC1G32?","answer":"The SN74AUP1G32DSF2 draws 500 nA quiescent maximum versus roughly 10 µA for the LVC version, making the AUP part the choice for battery-powered always-on circuits. The LVC variant typically offers higher output drive (24 mA vs 4 mA) and operates from 1.65V to 5.5V, so it fits 5V-tolerant legacy buses. Packages differ — the AUP comes in 6-XFDFN (1 mm × 1 mm), while the LVC is available in larger SOT-23 and SC-70 packages."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/SN74AUP1G32DSF2","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/SN74AUP1G32DSF2 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}