{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SN74ACT7200L15DV","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"SN74ACT7200L15DV","canonicalUrl":"https://icboms.com/texas-instruments/SN74ACT7200L15DV","factsUrl":"https://icboms.com/api/mcp/products/SN74ACT7200L15DV","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments SN74ACT7200L15DV, asynchronous FIFO memory, 256 x 9 organization, 15 ns access time, Bulk shipping medium.","salesMarkdown":"The Texas Instruments SN74ACT7200L15DV is a 256-word by 9-bit asynchronous FIFO memory. The '15' in the order code signals a 15 ns access time, which governs how fast the read pointer can present data on the output bus after the read-enable edge. For an asynchronous FIFO, that access time sets the maximum sustainable read rate and the timing margin against the downstream logic's setup window. If the rest of the bus runs at 50 MHz or slower, this part clears the hold and setup budget without extra wait states. The 9-bit width (8 data bits plus a parity/flag bit) suits byte-wide data paths with an error-detection overlay.","metaTitle":"SN74ACT7200L15DV 256 x 9 Async FIFO, 15 ns Access","metaDescription":"Texas Instruments SN74ACT7200L15DV asynchronous FIFO memory, 256 x 9 organization. Access time 15 ns. RoHS compliant.","metaKeywords":null},"attributes":{"series":"*","packageCase":null,"mountingType":null,"rohsStatus":"Not applicable","productStatus":"Active","categoryPath":["Logic ICs"],"specifications":{"Series":"*","Package":"Bulk","lifecycle_stage":"eol_hot"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.27","priceTiers":[{"qty":57,"price":"$5.27000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/05581be0ff288c0a9612990d00af6629.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/SN74ACT7200L15DV/alternatives.json"},"ai":{"faq":[{"question":"What is the access time of SN74ACT7200L15DV?","answer":"The '15' in the order code indicates a 15 ns access time for this asynchronous FIFO. That is the time from the read-enable edge to valid data on the output bus."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/SN74ACT7200L15DV","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/SN74ACT7200L15DV when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}