{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"S25FL164K0XMFBQ13","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"S25FL164K0XMFBQ13","canonicalUrl":"https://icboms.com/infineon/S25FL164K0XMFBQ13","factsUrl":"https://icboms.com/api/mcp/products/S25FL164K0XMFBQ13","rawCanonicalId":null},"summary":{"shortDescription":"Infineon FL1-K series, 64Mbit NOR Flash, AEC-Q100, 108MHz Quad SPI, 2.7-3.6V, -40 to 105°C, 8-SOIC 5.30mm T/R.","salesMarkdown":"The S25FL164K0XMFBQ13: Page write time is 3 ms typical, which sets the floor for firmware update latency: a full 64 Mbit chip erase followed by page-by-page programming takes several seconds, so field-update strategies should budget for this. Infineon lists the S25FL164K0XMFBQ13 as Obsolete. No pin-compatible direct replacement from Infineon exists for new designs — a board spin or software migration to a different NOR Flash family is required for production ramps. For existing BOM positions already qualified with this part, the 8-SOIC 5.30 mm footprint and 2.7-3.6V supply rail are the key fit parameters to match when evaluating a replacement. The AEC-Q100 qualification means the replacement must also carry automotive-grade temperature and reliability testing to avoid a full re-qualification cycle. The surface-mount package is supplied in Tape & Reel, suitable for automated pick-and-place assembly. No special thermal management is needed for the 64 Mbit density at 108 MHz — the package's junction-to-ambient thermal resistance is adequate for the self-heating from the active read current. The Quad SPI interface shares the same four I/O pins as standard SPI, so the PCB layout is backward-compatible with legacy SPI NOR Flash footprints.","metaTitle":"Infineon S25FL164K0XMFBQ13 64Mbit NOR Flash, AEC-Q100","metaDescription":"Obsolete Infineon S25FL164K0XMFBQ13 64Mbit NOR Flash, AEC-Q100, 108MHz Quad SPI, 2.7-3.6V, -40 to 105°C, 8-SOIC. Sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"S25FL164K0XMFBQ13","Series":"Automotive, AEC-Q100, FL1-K","Package":"Tape & Reel (TR)","Technology":"FLASH - NOR","Memory Size":"64Mbit","Memory Type":"Non-Volatile","Memory Format":"FLASH","Mounting Type":"Surface Mount","Package / Case":"8-SOIC (0.209\\\", 5.30mm Width)","Clock Frequency":"108 MHz","lifecycle_stage":"eol_hot","Memory Interface":"SPI - Quad I/O","Voltage - Supply":"2.7V ~ 3.6V","Base Product Number":"S25FL164","Memory Organization":"8M x 8","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"8-SOIC","Write Cycle Time - Word, Page":"3ms"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/a68b7e99eb04ca36ab30eedaef96990c.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the closest pin-compatible alternative to S25FL164K0XMFBQ13?","answer":"The 8-SOIC 5.30 mm footprint and 2.7-3.6V supply are the key fit parameters to match when evaluating a replacement from another supplier or family. Any alternative must also carry AEC-Q100 qualification to avoid re-qualification in an automotive BOM."},{"question":"What compliance documentation does Infineon provide for S25FL164K0XMFBQ13?","answer":"The part is listed as part of the FL1-K series with AEC-Q100 automotive qualification. Standard RoHS and REACH compliance documentation is available from Infineon for this part number."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/S25FL164K0XMFBQ13","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/S25FL164K0XMFBQ13 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:27:53.986Z","lastPublished":"2026-07-21T02:27:53.986Z","indexable":true}}