{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"S25FL132K0XBHV023","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"S25FL132K0XBHV023","canonicalUrl":"https://icboms.com/infineon/S25FL132K0XBHV023","factsUrl":"https://icboms.com/api/mcp/products/S25FL132K0XBHV023","rawCanonicalId":null},"summary":{"shortDescription":"Infineon (Cypress) FL1-K series, S25FL132K0XBHV023, 32Mbit NOR Flash, SPI Quad I/O, 108 MHz clock, 2.7-3.6V supply, -40 to 105°C, 24-TBGA package.","salesMarkdown":"## 32 Mbit NOR Flash, Quad SPI — what you're getting It uses a SPI interface with Quad I/O support, clocked at 108 MHz, organized as 4M x 8 bits. ## Obsolete — plan the bridge now That means Infineon has ended production — no last-time-buy window remains. ## 108 MHz Quad SPI — bus throughput without dead cycles The Quad I/O interface at 108 MHz gives you a read throughput that keeps up with cached code execution in many MCU designs — no need for a separate XIP controller. If you're doing OTA firmware staging, the 4 KB and 64 KB sector erase granularity (not listed here but standard for the FL1-K family) matters when sizing the staging area. ## 24-TBGA — layout checklist The BGA footprint needs via-in-pad or dogbone fanout; plan decoupling caps within 5 mm of the VDD balls. No thermal pad — dissipation is through the balls and PCB copper.","metaTitle":"S25FL132K0XBHV023 32Mbit NOR Flash, 108 MHz SPI, 24-TBGA","metaDescription":"S25FL132K0XBHV023 from Infineon (Cypress) FL1-K series: 32Mbit NOR Flash, SPI Quad I/O at 108 MHz, 2.7-3.6V, -40 to 105°C, 24-TBGA.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"FL1-K","Package":"Tape & Reel (TR)","Technology":"FLASH - NOR","Memory Size":"32Mbit","Memory Type":"Non-Volatile","Memory Format":"FLASH","Mounting Type":"Surface Mount","Package / Case":"24-TBGA","Product Status":"Obsolete","Clock Frequency":"108 MHz","lifecycle_stage":"eol_hot","Memory Interface":"SPI - Quad I/O","Voltage - Supply":"2.7V ~ 3.6V","Base Product Number":"S25FL132","Memory Organization":"4M x 8","Operating Temperature":"-40°C~105°C(TA)","Supplier Device Package":"24-BGA (8x6)","Write Cycle Time - Word, Page":"3ms"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/7d9913df32b66d1dec79117d154aa352.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the closest pin-compatible alternative to S25FL132K0XBHV023?","answer":"The FL1-K series has higher-density siblings (64 Mbit, 128 Mbit) that share the 24-TBGA footprint and Quad SPI interface, but you would need to verify pin compatibility against the specific density variant's datasheet. For a direct drop-in, check Infineon's S25FL132K family in the same package — but with this part obsolete, expect to requalify a newer series like the S25FL-L or S25HS family."},{"question":"What compliance documentation does Infineon provide for S25FL132K0XBHV023?","answer":"The available records do not list RoHS, REACH, UL, or IEC certification details for this specific order code. As a NOR Flash from a major manufacturer, it is generally RoHS-compliant (lead-free) by default, but you should request the manufacturer's compliance declaration from your sourcing partner. We can provide the Infineon material declaration upon request at quote time."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/S25FL132K0XBHV023","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/S25FL132K0XBHV023 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}