{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"QS5920AQ","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"QS5920AQ","canonicalUrl":"https://icboms.com/renesas/QS5920AQ","factsUrl":"https://icboms.com/api/mcp/products/QS5920AQ","rawCanonicalId":null},"summary":{"shortDescription":"QS5920AQ clock driver, PLL Yes, 1:11 fanout, 100MHz max, 3V-3.6V supply, 48-DIP (0.600\", 15.24mm), Through Hole, -40°C to +85°C.","salesMarkdown":"## 100 MHz PLL clock driver with 1:11 fanout The QS5920AQ is a PLL-based clock driver designed to distribute a single input clock to eleven outputs at up to 100 MHz, targeting SDRAM memory systems that need a clean, low-skew clock tree. It runs from a 3V to 3.6V supply and is specified over the full -40°C to +85°C industrial temperature range, so it fits into telecom, networking, and industrial controller boards that see temperature swings. ## Package and integration note Housed in a 48-pin PDIP (0.600\" body width, 15.24 mm row spacing), the QS5920AQ is a through-hole part — it suits prototype runs, rework-friendly designs, or legacy boards where a DIP socket is already on the layout. The differential input and output are both single-ended (No/No), so it accepts and drives standard CMOS/TTL-level clock signals without external termination resistors for a differential pair. With a 1:11 input-to-output ratio, a single QS5920AQ can fan out the system clock to eleven SDRAM devices or DIMM slots, keeping the trace lengths matched and the skew within the PLL's lock range. ## Lifecycle and sourcing Note the RoHS status: marked as non-compliant. If your BOM requires RoHS-10/10 exemption or full lead-free compliance, this part does not carry that cert; check your assembly house's policy on tin-lead DIPs before committing the line. Sourced to order through independent distribution; availability and current pricing are confirmed at RFQ against your target quantity.","metaTitle":"QS5920AQ Clock Driver, 100MHz, 1:11 Fanout, 48-DIP","metaDescription":"QS5920AQ clock driver with PLL, 100MHz max, 1:11 fanout, 3V-3.6V supply, -40°C to +85°C. Active production, RoHS non-compliant. Sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"PLL":"Yes","Input":"Clock","Output":"Clock","Package":"Bulk","Main Purpose":"SDRAM","Mounting Type":"Through Hole","Package / Case":"48-DIP (0.600\\\", 15.24mm)","Frequency - Max":"100MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3V ~ 3.6V","Number of Circuits":"1","Ratio - Input:Output":"1:11","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"48-PDIP","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$3.98","stockQuantity":0,"priceTiers":[{"qty":76,"price":"$3.98000","currency":"USD"}]},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"What is the QS5920AQ's PLL and fanout configuration?","answer":"The QS5920AQ has an integrated PLL (PLL = Yes) and a 1:11 input-to-output ratio, meaning it takes one input clock and delivers eleven output copies, each at up to 100 MHz."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/QS5920AQ","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/QS5920AQ when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}