{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"OR3T806S208-DB","brand":"Lattice Semiconductor","brandSlug":"lattice","productSlug":"OR3T806S208-DB","canonicalUrl":"https://icboms.com/lattice/OR3T806S208-DB","factsUrl":"https://icboms.com/api/mcp/products/OR3T806S208-DB","rawCanonicalId":null},"summary":{"shortDescription":"Lattice Semiconductor ORCA™3C FPGA, OR3T806S208-DB, 116000 gates, 171 I/O, 63488 bits RAM, 3 V, 0°C to 70°C, Surface Mount, Bulk.","salesMarkdown":"## Active ORCA3C FPGA with 116K gates and 171 I/O The Lattice Semiconductor OR3T806S208-DB is an FPGA from the ORCA™3C series, packing 116000 gates and 3872 logic elements into a 208-pin surface-mount package. It delivers 171 user I/O and 63488 bits of on-chip block RAM, making it a fit for glue-logic consolidation or medium-density control-path designs in commercial-temperature environments. ## What the parametric specs mean for a board-level decision The 171 I/O count means this part can handle a 32-bit data bus plus address and control lines with room left for peripheral handshakes — useful when you need to hang a memory controller and a few UARTs off the same die without a CPLD expander. 63488 bits of total block RAM (about 8 KB) is enough for small FIFOs, coefficient tables, or a line buffer in a video scaler; anything larger forces an external SRAM or SDRAM interface through the I/O pins. Runs on a 3 V supply rail — common for 3.3 V logic families, but check that your board's 3.3 V regulator can source the core current without droop; the ORCA3C family's dynamic current scales with toggle rate, so a 1 A-rated LDO is a safe starting point for most designs. If the board sees -20°C or 85°C ambient, this part will drift out of timing. ## Package and board-fit: 208-pin surface mount in Bulk Supplied in Bulk (tubes or trays, not tape-and-reel), so it is suited for prototype runs and low-to-medium volume production where pick-and-place feeders aren't critical. The 208-pin QFP-style package has a standard 0.50 mm pitch — a 4-layer board with via-in-pad is recommended for fan-out, though a well-designed 2-layer board can work if the I/O count stays under 100.","metaTitle":"Lattice OR3T806S208-DB FPGA, 116K gates, 171 I/O, ORCA3C","metaDescription":"Lattice Semiconductor OR3T806S208-DB FPGA from ORCA3C series, 116000 gates, 171 I/O, 63488 bits RAM, 3V supply, 0-70C. Active production, sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"series":"ORCA™3C","package_type":"Bulk","Number Of I/O":"171","mounting_type":"Surface Mount","Total Ram Bits":"63488","product_status":"Active","Number Of Gates":"116000","lifecycle_stage":"eol_hot","supply_voltage_v":"3.0","Operating Temperature High":"0°C to 70°C(TA)","Number Of Logic Elements/Cells":"3872"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$109.79","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/144172b99c2020509626ebf20200f8e8.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Will OR3T806S208-DB drop into a board originally designed for LCMXO3L-4300C-5BG324C?","answer":"No — the LCMXO3L-4300C-5BG324C is a MachXO3 FPGA in a 324-ball BGA package with 279 I/O and a 2.375 V supply, while the OR3T806S208-DB is an ORCA3C FPGA in a 208-pin QFP with 171 I/O at 3 V. The package, pinout, and supply rails are different, so a board spin is required."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/lattice/OR3T806S208-DB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/lattice/OR3T806S208-DB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}