{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"OMAPL138EZWTA3R","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"OMAPL138EZWTA3R","canonicalUrl":"https://icboms.com/texas-instruments/OMAPL138EZWTA3R","factsUrl":"https://icboms.com/api/mcp/products/OMAPL138EZWTA3R","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments OMAP-L1x series, OMAPL138EZWTA3R, ARM926EJ-S + C674x DSP, 375 MHz, dual USB (1.1 + PHY, 2.0 + PHY), SATA 3Gbps, 10/100 Ethernet, 361-NFBGA, -40 to 105°C.","salesMarkdown":"## ARM926 + C674x DSP — what this dual-core processor brings to the BOM The Texas Instruments OMAPL138EZWTA3R is a dual-core applications processor combining an ARM926EJ-S general-purpose core with a C674x floating-point DSP on a single die. The ARM core handles OS and control tasks at 375 MHz while the DSP offloads real-time signal processing — audio, vibration analysis, motor control loops — without an external DSP chip. This architecture collapses what used to be a two-chip BOM into one 361-NFBGA package, saving board area and reducing interconnect complexity. The peripheral set is built for industrial gateway and data-acquisition roles: dual USB ports (one USB 1.1 with PHY, one USB 2.0 with PHY), a SATA 3Gbps interface for local storage, and a 10/100 Ethernet MAC for network connectivity. Additional interfaces including HPI, I²C, McASP, McBSP, MMC/SD, SPI, and UART cover sensor fusion, display (LCD controller), and legacy serial links. The SDRAM controller keeps memory cost predictable — no DDR3 layout complexity required. Rated for -40°C to 105°C junction temperature, this part is qualified for industrial enclosures, outdoor telecom cabinets, and engine-bay-adjacent electronics where commercial-grade parts would drift out of spec. The 1.8V and 3.3V I/O rails let it interface directly with common sensor and memory voltage domains without level shifters on every line. ## Security and boot — factory-programmed or field-locked On-chip security features include boot authentication and cryptography acceleration, allowing encrypted firmware images and secure boot chain validation. For designs that lock the boot process against tampering — metering, pay-per-use equipment, or IP-protected firmware — this eliminates the need for an external secure element. ## Active lifecycle — no LTB clock ticking No last-time-buy notice, no NRND flag. For a production BOM freeze, this means the part is still in TI's standard ordering system and factory pipeline — not a surplus-channel scavenge. The ROHS3 compliance covers current environmental regulations across EU and Asia markets without exemption paperwork.","metaTitle":"TI OMAPL138EZWTA3R ARM9 + C674x DSP, 375 MHz, 361-NFBGA","metaDescription":"TI OMAPL138EZWTA3R dual-core processor: ARM926EJ-S at 375 MHz with C674x DSP. USB 1.1 & 2.0, SATA 3Gbps, 10/100 Ethernet. Active, -40 to 105°C.","metaKeywords":null},"attributes":{"series":"OMAP-L1x","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["DC-DC Power Modules"],"specifications":{"USB":"USB 1.1 + PHY (1), USB 2.0 + PHY (1)","SATA":"SATA 3Gbps (1)","Speed":"375MHz","Series":"OMAP-L1x","Package":"Tape & Reel (TR); Cut Tape (CT)","Ethernet":"10/100Mbps (1)","Mounting Type":"Surface Mount","Voltage - I/O":"1.8V, 3.3V","Core Processor":"ARM926EJ-S","Package / Case":"361-LFBGA","RAM Controllers":"SDRAM","lifecycle_stage":"eol_hot","Co-Processors/DSP":"Signal Processing; C674x, System Control; CP15","Security Features":"Boot Security, Cryptography","Additional Interfaces":"HPI, I²C, McASP, McBSP, MMC/SD, SPI, UART","Graphics Acceleration":"No","Operating Temperature":"-40°C ~ 105°C (TJ)","Supplier Device Package":"361-NFBGA (16x16)","Number of Cores/Bus Width":"1 Core, 32-Bit","Display & Interface Controllers":"LCD"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$28.32","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$28.32000","currency":"USD"},{"qty":10,"price":"$26.11700","currency":"USD"},{"qty":25,"price":"$24.94280","currency":"USD"},{"qty":100,"price":"$22.30190","currency":"USD"},{"qty":250,"price":"$21.27480","currency":"USD"},{"qty":1000,"price":"$19.07395","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/23ec7ced3c2b01627c6720417460b0e1.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What are the alternatives or cross references for OMAPL138EZWTA3R?","answer":"The closest sibling within the OMAP-L1x family is the OMAPL138BZWTA3R. The difference is in the silicon revision — the -EZW- variant carries an extended feature set versus the -BZW- stepping. Both share the same ARM926EJ-S + C674x DSP architecture, 375 MHz speed, 361-NFBGA package, and pinout. For a drop-in replacement, verify the silicon revision requirements with your firmware team before swapping."},{"question":"What is OMAPL138EZWTA3R's listed USB and SATA configuration?","answer":"The part integrates two USB ports: one USB 1.1 with integrated PHY and one USB 2.0 with integrated PHY. For mass storage, it includes a single SATA 3Gbps port. These are on-chip — no external PHY chips needed for the USB interfaces, which saves BOM cost and board area."},{"question":"What voltage rails does OMAPL138EZWTA3R require?","answer":"The I/O voltage is rated for 1.8V and 3.3V domains. The core voltage is not specified in this listing; refer to the TI datasheet for the VDD and PLL supply values. The 1.8V/3.3V I/O rails allow direct connection to common SDRAM, NOR Flash, and sensor interfaces without external level translators."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/OMAPL138EZWTA3R","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/OMAPL138EZWTA3R when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}