{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MIMXRT1165XVM5A","brand":"NXP USA Inc.","brandSlug":"nxp-usa-inc","productSlug":"MIMXRT1165XVM5A","canonicalUrl":"https://icboms.com/nxp-usa-inc/MIMXRT1165XVM5A","factsUrl":"https://icboms.com/api/mcp/products/MIMXRT1165XVM5A","rawCanonicalId":null},"summary":{"shortDescription":"NXP i.MX RT series, MIMXRT1165XVM5A, 32-Bit Dual-Core MCU, ARM Cortex-M4/M7, 240MHz / 500MHz, 1M x 8 RAM, 289-LFBGA (14x14), -40°C to 125°C.","salesMarkdown":"## Dual-core architecture for real-time and application processing The NXP MIMXRT1165XVM5A is a 32-bit dual-core microcontroller from the i.MX RT series, pairing an ARM Cortex-M7 core running at 500 MHz with a Cortex-M4 core at 240 MHz. This asymmetric split lets the M7 handle the main application stack and signal processing while the M4 manages deterministic real-time control loops, motor commutation, or sensor fusion — no external companion MCU needed. The part executes from external program memory, which keeps the BOM flexible on Flash density but means the designer must budget for a parallel NOR or HyperFlash device and the associated PCB routing. On-chip connectivity includes CANbus, Ethernet, USB OTG, I²C, SPI, SAI, SPDIF, and MMC/SD/SDIO — enough to serve as the central gateway in an HMI panel or a multi-protocol industrial bridge without external PHYs or transceivers beyond the physical layer. The data converters (2x12-bit ADC, 1x12-bit DAC) cover analog feedback from current shunts or thermocouple inputs.","metaTitle":"NXP MIMXRT1165XVM5A i.MX RT1165 Dual-Core MCU, 500 MHz","metaDescription":"NXP MIMXRT1165XVM5A i.MX RT series 32-bit dual-core MCU with ARM Cortex-M4 at 240 MHz and M7 at 500 MHz. 1M x 8 RAM, -40 to 125°C, 289-LFBGA. Active production, available to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Mfr":"NXP USA Inc.","Speed":"240MHz, 500MHz","Series":"i.MX","Package":"Tray","RAM Size":"1M x 8","Core Size":"32-Bit Dual-Core","EEPROM Size":"-","Peripherals":"Brown-out Detect/Reset, DMA, POR, PWM, WDT","Connectivity":"CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG","Mounting Type":"Surface Mount","Core Processor":"ARM® Cortex®-M4/M7","Package / Case":"289-LFBGA","Product Status":"Active","Data Converters":"A/D 2x12b; D/A 1x12b","Oscillator Type":"Internal","lifecycle_stage":"unknown","Base Product Number":"MIMXRT1165","Program Memory Size":"-","Program Memory Type":"External Program Memory","Operating Temperature":"-40°C ~ 125°C (TJ)","Supplier Device Package":"289-LFBGA (14x14)","Voltage - Supply (Vcc/Vdd)":"2.4V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$15.9512","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/a7968c386c6f383e3318b362f2d5b6c8.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/MIMXRT1165XVM5A/alternatives.json"},"ai":{"faq":[{"question":"What is MIMXRT1165XVM5A's listed speed?","answer":"The Cortex-M7 core runs at 500 MHz and the Cortex-M4 core runs at 240 MHz, giving a dual-speed asymmetric architecture for mixed real-time and application processing."},{"question":"What is the operating temperature range of MIMXRT1165XVM5A?","answer":"The junction temperature range is -40°C to 125°C, qualifying the part for automotive and extended-industrial environments without a separate temperature-grade variant."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp-usa-inc/MIMXRT1165XVM5A","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp-usa-inc/MIMXRT1165XVM5A when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-16T10:39:33.080Z","lastPublished":"2026-07-16T10:39:33.080Z","indexable":true}}