{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MIMXRT106ADVL6AR","brand":"NXP USA Inc.","brandSlug":"nxp-usa-inc","productSlug":"MIMXRT106ADVL6AR","canonicalUrl":"https://icboms.com/nxp-usa-inc/MIMXRT106ADVL6AR","factsUrl":"https://icboms.com/api/mcp/products/MIMXRT106ADVL6AR","rawCanonicalId":null},"summary":{"shortDescription":"NXP i.MX RT1060 crossover MCU, MIMXRT106ADVL6AR, ARM Cortex-M7 core at 600 MHz, 1M x 8 SRAM, 196-MAPBGA (10x10 mm), 0°C to 95°C, 3V to 3.6V supply, Tape & Reel.","salesMarkdown":"The NXP MIMXRT106ADVL6AR is a crossover MCU from the i.MX RT1060 series built around a single ARM Cortex-M7 core running at 600 MHz. It carries 1 MB of on-chip SRAM and relies on external program memory, so the BOM must budget for a Flash or PSRAM device on the EBI/EMI bus. The 196-ball MAPBGA (10x10 mm) keeps the footprint compact for space-constrained designs like HMI panels, edge gateways, or motor-control front ends. The 0°C to 95°C junction temperature range suits commercial and light industrial environments — not rated for extended automotive or outdoor enclosures without thermal management. The MIMXRT106ADVL6AR has an Active lifecycle status. NXP continues to manufacture and support it. No last-time-buy or discontinuation notice is issued.","metaTitle":"NXP MIMXRT106ADVL6AR i.MX RT1060 MCU, ARM Cortex-M7 600MHz","metaDescription":"NXP MIMXRT106ADVL6AR i.MX RT1060 crossover MCU: ARM Cortex-M7 at 600 MHz, 1 MB SRAM, 196-MAPBGA, 0°C to 95°C. Active, available to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Mfr":"NXP USA Inc.","Speed":"600MHz","Series":"RT1060","Package":"Tape & Reel (TR)","RAM Size":"1M x 8","Core Size":"32-Bit Single-Core","EEPROM Size":"-","Peripherals":"Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT","Connectivity":"CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG","Mounting Type":"Surface Mount","Number of I/O":"127","Core Processor":"ARM® Cortex®-M7","Package / Case":"196-LFBGA","Data Converters":"A/D 20x12b","Oscillator Type":"External, Internal","lifecycle_stage":"unknown","Base Product Number":"MIMXRT106","Program Memory Size":"-","Program Memory Type":"External Program Memory","Operating Temperature":"0°C~95°C(TJ)","Supplier Device Package":"196-MAPBGA (10x10)","Voltage - Supply (Vcc/Vdd)":"3V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/a2b47518fdbbb88fae8eaffbdde9ed60.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/MIMXRT106ADVL6AR/alternatives.json"},"ai":{"faq":[{"question":"What is the core processor of MIMXRT106ADVL6AR?","answer":"The MIMXRT106ADVL6AR uses an ARM Cortex-M7 core, 32-bit single-core, running at 600 MHz."},{"question":"What is the package and pin count of MIMXRT106ADVL6AR?","answer":"It comes in a 196-ball MAPBGA (10x10 mm) package with 127 GPIOs."},{"question":"What is the difference between MIMXRT106ADVL6A and MIMXRT106ADVL6AR?","answer":"The 'R' suffix on MIMXRT106ADVL6AR indicates Tape & Reel packaging; the non-'R' variant typically ships in tray format. The silicon and ratings are identical."},{"question":"What compiler is used for i.MX RT1060?","answer":"NXP provides MCUXpresso IDE based on GCC, and the part is also supported by IAR EWARM and Keil MDK — all three can target the Cortex-M7 core."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp-usa-inc/MIMXRT106ADVL6AR","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp-usa-inc/MIMXRT106ADVL6AR when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-16T10:39:33.080Z","lastPublished":"2026-07-16T10:39:33.080Z","indexable":true}}