{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MIMXRT1021CAF4A","brand":"NXP USA Inc.","brandSlug":"nxp-usa-inc","productSlug":"MIMXRT1021CAF4A","canonicalUrl":"https://icboms.com/nxp-usa-inc/MIMXRT1021CAF4A","factsUrl":"https://icboms.com/api/mcp/products/MIMXRT1021CAF4A","rawCanonicalId":null},"summary":{"shortDescription":"NXP i.MX RT1020 series, MIMXRT1021CAF4A crossover MCU, ARM Cortex-M7 at 400 MHz, 128 KB RAM, 57 GPIO, CANbus/Ethernet/USB OTG, 10×12-bit ADC, external program memory, 100-LQFP (14×14), -40°C to 105°C TJ.","salesMarkdown":"The NXP MIMXRT1021CAF4A is a crossover microcontroller from the RT1020 series, built around a single ARM Cortex-M7 core clocked at 400 MHz. It carries 128 KB of on-chip RAM and relies entirely on external program memory — no embedded Flash. Peripheral set includes CANbus, Ethernet, USB OTG, I²C, SPI, UART, and a 10-channel 12-bit ADC. The 100-LQFP package with a 14×14 mm footprint is rated for junction temperatures from -40°C to 105°C, suiting it for industrial motor drives, outdoor telecom gateways, and engine-bay control modules where on-chip Flash is not required and the design already provisions an external SPI/NOR boot device. The 400 MHz Cortex-M7 delivers the instruction throughput for hard real-time tasks like dual-motor field-oriented control or Ethernet packet processing without a separate co-processor. At this clock rate, the zero-wait-state TCM access keeps interrupt latency deterministic. Designs that need on-chip Flash for boot should look at the RT1020 variants with internal program memory; this part boots from an external QSPI NOR device, which adds a BOM line but allows larger firmware images. ## External program memory — design constraint Firmware resides on an external SPI or HyperFlash device, booted via the integrated EBI/EMI or FlexSPI interface. This means the PCB must route the memory bus with controlled impedance for higher-speed boot modes. Field updates require a bootloader in the external memory that can self-reprogram — no on-chip Flash to fall back on. The 128 KB of on-chip RAM is available for code shadowing and scratch data, not for persistent storage.","metaTitle":"NXP MIMXRT1021CAF4A i.MX RT1020 Crossover MCU, 400MHz ARM Cortex-M7","metaDescription":"NXP MIMXRT1021CAF4A crossover MCU with ARM Cortex-M7 at 400MHz, 128KB RAM, CANbus/Ethernet/USB OTG. Obsolete, sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Speed":"400MHz","title":"MIMXRT1021CAF4A","Series":"RT1020","Package":"Tray","RAM Size":"128K x 8","Core Size":"32-Bit Single-Core","Peripherals":"Brown-out Detect/Reset, DMA, POR, PWM, WDT","Connectivity":"CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG","Mounting Type":"Surface Mount","Number of I/O":"57","Core Processor":"ARM® Cortex®-M7","Package / Case":"100-LQFP","Data Converters":"A/D 10x12b","Oscillator Type":"External, Internal","Base Product Number":"MIMXRT1021","Program Memory Type":"External Program Memory","Operating Temperature":"-40°C~105°C(TJ)","Supplier Device Package":"100-LQFP (14x14)","Voltage - Supply (Vcc/Vdd)":"3V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$13.1500","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/3e550eb3810db932e54dce503185e2f9.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/MIMXRT1021CAF4A/alternatives.json"},"ai":{"faq":[{"question":"What is the closest pin-compatible alternative to the MIMXRT1021CAF4A?","answer":"NXP offers pin-compatible RT1020 family variants with internal Flash, such as the MIMXRT1021CAG4A. Verify the exact memory map, boot configuration, and firmware migration path before substituting."},{"question":"What is the core speed of the MIMXRT1021CAF4A?","answer":"The ARM Cortex-M7 core runs at 400 MHz, providing deterministic throughput for real-time control and packet processing without a co-processor."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp-usa-inc/MIMXRT1021CAF4A","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp-usa-inc/MIMXRT1021CAF4A when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T17:20:20.394Z","lastPublished":"2026-07-11T17:20:20.394Z","indexable":true}}