{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MCIMX6L3EVN10AB","brand":"NXP Semiconductors","brandSlug":"nxp","productSlug":"MCIMX6L3EVN10AB","canonicalUrl":"https://icboms.com/nxp/MCIMX6L3EVN10AB","factsUrl":"https://icboms.com/api/mcp/products/MCIMX6L3EVN10AB","rawCanonicalId":null},"summary":{"shortDescription":"NXP Semiconductors i.MX6SL series, ARM Cortex-A9 microprocessor, MCIMX6L3EVN10AB, 1.0GHz core, 432-MAPBGA 13x13 mm, -40 to 105°C, ROHS3.","salesMarkdown":"## Core architecture and clock budget for the BOM line The MCIMX6L3EVN10AB is a single-core ARM Cortex-A9 application processor from the NXP i.MX6SL series, running at 1.0 GHz. This is the maximum core frequency; actual throughput depends on the flash wait-state profile and the memory controller configuration. The NEON SIMD coprocessor handles single-instruction multiple-data (SIMD) operations for multimedia and signal-processing tasks without loading the Cortex-A9 pipeline. Graphics acceleration is present on-die, driving the LCD display controller. Memory controller supports LPDDR2, LVDDR3, and DDR3 — the board designer picks the memory type that matches the target cost and speed grade. The 432-MAPBGA (13x13 mm) package requires a 4-layer PCB minimum for fan-out of the 0.50 mm pitch balls. ## Peripheral set and connectivity for system integration The single 10/100 Ethernet MAC with on-chip PHY provides wired networking without an external magnetics module — the PHY is internal, so only the RJ45 connector and isolation transformer are needed on the board. Additional interfaces include AC97, I2C, I2S, MMC/SD/SDIO, SPI, SSI, and UART — covering audio codec, touch controller, storage, and serial debug. The I/O voltage rails are 1.2 V, 1.8 V, and 3.0 V, requiring three separate supply domains on the PCB. Security features are hardware-enforced: ARM TrustZone, boot security, cryptography engine, secure fuse box, secure JTAG, secure memory, secure RTC, and tamper detection. These blocks run independently of the Cortex-A9 core, so secure boot and key storage do not consume application MIPS. An outdoor IoT gateway or factory controller that sees 85°C on a summer production floor still has 20°C of margin before the silicon junction hits the rated limit. Production status is active per NXP's lifecycle record. The part is ROHS3 compliant, meeting the EU RoHS exemption 7(c)-I for lead in solder.","metaTitle":"NXP MCIMX6L3EVN10AB i.MX6SL Cortex-A9 1.0GHz MPU","metaDescription":"NXP MCIMX6L3EVN10AB i.MX6SL single-core ARM Cortex-A9 processor, 1.0GHz, 432-MAPBGA, -40 to 105°C. Active production, ROHS3. Request a quote.","metaKeywords":null},"attributes":{"series":"i.MX6SL","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"USB":"USB 2.0 + PHY (3)","Speed":"1.0GHz","Series":"i.MX6SL","Package":"Tray","Ethernet":"10/100Mbps (1)","Mounting Type":"Surface Mount","Voltage - I/O":"1.2V, 1.8V, 3.0V","Core Processor":"ARM® Cortex®-A9","Package / Case":"432-TFBGA","RAM Controllers":"LPDDR2, LVDDR3, DDR3","lifecycle_stage":"eol_hot","Co-Processors/DSP":"Multimedia; NEON™ SIMD","Security Features":"ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC, Tamper Detection","Additional Interfaces":"AC97, I2C, I2S, MMC/SD/SDIO, SPI, SSI, UART","Graphics Acceleration":"Yes","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"432-MAPBGA (13x13)","Number of Cores/Bus Width":"1 Core, 32-Bit","Display & Interface Controllers":"Keypad, LCD"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$32.27","stockQuantity":19,"priceTiers":[{"qty":1,"price":"$32.27000","currency":"USD"},{"qty":10,"price":"$25.87800","currency":"USD"},{"qty":80,"price":"$22.09825","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/d0c9f0e19e2ee246170c49df6fb013f3.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What memory types does the MCIMX6L3EVN10AB memory controller support?","answer":"The on-chip memory controller supports LPDDR2, LVDDR3, and DDR3. The board designer selects the memory type based on cost, speed, and voltage requirements — all three are single-rail interfaces that connect directly to the processor without an external memory controller."},{"question":"What is the USB configuration on the MCIMX6L3EVN10AB?","answer":"The processor integrates three USB 2.0 ports, each with its own on-chip PHY. This means no external USB transceiver is required — the differential D+/D- lines route directly from the package balls to the USB connector."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp/MCIMX6L3EVN10AB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp/MCIMX6L3EVN10AB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}