{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MCIMX6L2EVN10AB","brand":"NXP Semiconductors","brandSlug":"nxp","productSlug":"MCIMX6L2EVN10AB","canonicalUrl":"https://icboms.com/nxp/MCIMX6L2EVN10AB","factsUrl":"https://icboms.com/api/mcp/products/MCIMX6L2EVN10AB","rawCanonicalId":null},"summary":{"shortDescription":"NXP i.MX6SL series, MCIMX6L2EVN10AB, ARM Cortex-A9 MPU, 1.0 GHz, 1 Core, 32-Bit, LPDDR2/LVDDR3/DDR3, USB 2.0 + PHY (3), 10/100Mbps Ethernet, -40°C ~ 105°C, 432-MAPBGA (13x13), Tray.","salesMarkdown":"## Key features and what they mean for your design The ARM Cortex-A9 core with NEON SIMD engine provides enough integer and signal-processing throughput for 2D graphics compositing, basic computer-vision pre-processing, and control-loop tasks without needing a separate DSP. The 1.0 GHz clock gives headroom for Linux or RTOS-based stacks running lightweight GUI frameworks. Three USB 2.0 ports with integrated PHY cover host and OTG roles — enough for a keyboard, a touch controller, and a USB storage device or cellular modem. The single 10/100 Ethernet MAC connects to a PHY for wired networking, though the part lacks a built-in switch, so multi-port designs need an external switch IC. On-chip security includes ARM TrustZone, secure boot, cryptography acceleration, secure fuse box, secure JTAG, secure memory, secure RTC, and tamper detection. This qualifies the MCIMX6L2EVN10AB for payment terminals, access-control panels, and any edge device that must resist physical or software attacks. The -40°C to 105°C operating range covers industrial, outdoor, and under-hood automotive (non-safety) environments without needing active cooling in most ambient conditions. The 1.2V, 1.8V, and 3.0V I/O voltage rails simplify interfacing to both low-voltage memory and legacy 3.0V peripherals.","metaTitle":"NXP MCIMX6L2EVN10AB i.MX6SL ARM Cortex-A9 MPU, 1.0 GHz","metaDescription":"NXP i.MX6SL MCIMX6L2EVN10AB ARM Cortex-A9 MPU at 1.0 GHz, -40 to 105°C, LPDDR2/DDR3, USB 2.0 + PHY, 10/100 Ethernet. Active, available to order.","metaKeywords":null},"attributes":{"series":"i.MX6SL","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"USB":"USB 2.0 + PHY (3)","Speed":"1.0GHz","Series":"i.MX6SL","Package":"Tray","Ethernet":"10/100Mbps (1)","Mounting Type":"Surface Mount","Voltage - I/O":"1.2V, 1.8V, 3.0V","Core Processor":"ARM® Cortex®-A9","Package / Case":"432-TFBGA","RAM Controllers":"LPDDR2, LVDDR3, DDR3","lifecycle_stage":"eol_hot","Co-Processors/DSP":"Multimedia; NEON™ SIMD","Security Features":"ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC, Tamper Detection","Additional Interfaces":"AC97, I²C, I²S, MMC/SD/SDIO, SPI, SSI, UART","Graphics Acceleration":"Yes","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"432-MAPBGA (13x13)","Number of Cores/Bus Width":"1 Core, 32-Bit","Display & Interface Controllers":"Keypad, LCD"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$30.88","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$30.88000","currency":"USD"},{"qty":10,"price":"$24.76600","currency":"USD"},{"qty":160,"price":"$21.14875","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/d0c9f0e19e2ee246170c49df6fb013f3.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What memory types does MCIMX6L2EVN10AB support?","answer":"The integrated memory controller supports LPDDR2, LVDDR3, and DDR3, giving the designer flexibility to choose the most cost-effective or power-efficient memory technology."},{"question":"Is MCIMX6L2EVN10AB compatible with DDR3 memory?","answer":"Yes, DDR3 is one of the supported RAM controller interfaces, along with LPDDR2 and LVDDR3."},{"question":"What is the difference between MCIMX6L2EVN10AB and MCIMX6L3EVN10AB?","answer":"The MCIMX6L3EVN10AB is a higher-tier member of the i.MX6SL family. The exact delta in core count, graphics, or peripheral set should be verified against the respective datasheets, but typically the variant adds more performance or connectivity headroom. For a pin-compatible drop-in, confirm the package and memory controller alignment."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp/MCIMX6L2EVN10AB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp/MCIMX6L2EVN10AB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}