{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"MAX509BCPP+","brand":"Analog Devices","brandSlug":"analog-devices","productSlug":"MAX509BCPP~3","canonicalUrl":"https://icboms.com/analog-devices/MAX509BCPP~3","factsUrl":"https://icboms.com/api/mcp/products/MAX509BCPP%2B","rawCanonicalId":null},"summary":{"shortDescription":"Analog Devices MAX509BCPP+ 8-bit DAC, quad voltage-buffered output, R-2R architecture, SPI interface, 6µs settling, 20-pin PDIP (0.300\"), through-hole, ±5V analog / 5V digital supply, 0°C to 70°C.","salesMarkdown":"## 8-bit quad DAC in a 20-pin PDIP — the board-fit story The MAX509BCPP+ is an 8-bit digital-to-analog converter with four independent voltage-buffered outputs, each settling to ½ LSB in 6 µs typical. The 20-pin PDIP (0.300\" wide, 7.62 mm) is a through-hole package that fits standard DIP sockets or solder-in on a 0.100\" pitch prototype board — no fine-pitch stencil needed, and the 100-mil lead spacing is hand-solderable in a rework loop. Four DACs in one package means a single SPI bus (data interface is SPI) and one external reference serve all four channels. The analog supply is ±5 V, the digital supply is 5 V — the split rails let the output swing near the analog rails while the digital core stays at a single 5 V level. ## R-2R architecture and what the linearity spec means The R-2R ladder architecture uses matched resistor ratios rather than a switched-capacitor charge-redistribution network — the INL spec is not explicitly stated, but the DNL is ±1 LSB max. A ±1 LSB DNL means no missing codes at 8-bit resolution; every digital input produces a unique analog output, and the step size between adjacent codes stays within one LSB of ideal. For an 8-bit DAC with 256 steps, a DNL within ±1 LSB guarantees monotonicity — the output always increases as the digital code increments. The 6 µs settling time is measured to ½ LSB for a full-scale step — this sets the per-channel update rate ceiling. With four channels, the SPI clock must complete a 16-bit frame (8-bit data plus control bits) within the settling window to avoid output contention. At 6 µs per channel, the aggregate throughput is roughly 166 kSPS across all four DACs if the SPI bus runs at 10 MHz or faster. ## Active lifecycle and compliance documentation The part is supplied in Tube packaging, the standard 20-PDIP tube quantity.","metaTitle":"Analog Devices MAX509BCPP+ 8-Bit Quad DAC, 6µs Settling","metaDescription":"MAX509BCPP+ 8-bit quad DAC from Analog Devices. Voltage-buffered R-2R output, SPI interface, 6µs settling, 20-PDIP. Active, RoHS3 compliant. Request quote.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"Package":"Tube","Output Type":"Voltage - Buffered","Architecture":"R-2R","INL/DNL (LSB)":"-, ±1 (Max)","Mounting Type":"Through Hole","Settling Time":"6µs (Typ)","Data Interface":"SPI","Number of Bits":"8","Package / Case":"20-DIP (0.300\\\", 7.62mm)","Reference Type":"External","lifecycle_stage":"eol_hot","Differential Output":"No","Operating Temperature":"0°C ~ 70°C","Supplier Device Package":"20-PDIP","Number of D/A Converters":"4","Voltage - Supply, Analog":"±5V","Voltage - Supply, Digital":"5V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$24.07","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$24.07000","currency":"USD"},{"qty":10,"price":"$22.19600","currency":"USD"},{"qty":25,"price":"$21.19800","currency":"USD"},{"qty":100,"price":"$18.95360","currency":"USD"},{"qty":250,"price":"$18.70420","currency":"USD"}]},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"What output type and interface does the MAX509BCPP+ use?","answer":"The DAC provides a voltage-buffered output and uses an SPI data interface. The architecture is an R-2R ladder, and the output is single-ended (no differential output,). An external voltage reference is required."},{"question":"What supply voltages does the MAX509BCPP+ require?","answer":"The analog supply is ±5 V and the digital supply is 5 V. The split-rail configuration allows the buffered output to swing near the analog rails while the digital interface operates at a single 5 V level."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/analog-devices/MAX509BCPP~3","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/analog-devices/MAX509BCPP~3 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}