{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LS1021AXN7MQB","brand":"NXP Semiconductors","brandSlug":"nxp","productSlug":"LS1021AXN7MQB","canonicalUrl":"https://icboms.com/nxp/LS1021AXN7MQB","factsUrl":"https://icboms.com/api/mcp/products/LS1021AXN7MQB","rawCanonicalId":null},"summary":{"shortDescription":"NXP QorIQ® Layerscape LS1021AXN7MQB, dual-core ARM® Cortex®-A7 MPU, 1.2 GHz, USB 3.0 + PHY, SATA 6Gbps, 3x GbE, DDR3L/DDR4, -40°C to 105°C, 525-FCPBGA.","salesMarkdown":"## Two cores at 1.2 GHz for the control plane The NXP LS1021AXN7MQB is a QorIQ Layerscale dual-core ARM Cortex-A7 processor running at 1.2 GHz. It targets the control-plane role in industrial switches, programmable logic controllers, and network-attached gateways. On the I/O side you get one USB 3.0 port with integrated PHY, one SATA 6 Gbps channel, and three Gigabit Ethernet MACs. That combination lets a single board serve as a storage appliance, a multi-port router, or a fieldbus head-end without external USB or SATA transceivers. The DDR3L/DDR4 memory controller gives the BOM flexibility to use whichever DRAM generation is cheaper at build time. ## Temperature grade and enclosure fit Rated for -40°C to 105°C, this part belongs in outdoor telecom cabinets, factory-floor controllers, and engine-bay-adjacent electronics where a fan is not guaranteed. The 525-FCPBGA (19x19 mm) footprint is a standard BGA for this performance tier; plan for a multi-layer PCB with at least four signal layers to route the DDR and GbE traces cleanly. ## Active lifecycle — no LTB pressure NXP lists the LS1021AXN7MQB as Active and ROHS3 compliant. There is no last-time-buy notice or NRND flag on this order code.","metaTitle":"NXP LS1021AXN7MQB QorIQ Layerscape MPU","metaDescription":"NXP LS1021AXN7MQB QorIQ Layerscape dual-core ARM Cortex-A7 MPU at 1.2 GHz. USB 3.0, SATA 6 Gbps, 3x GbE. -40°C to 105°C. Active production.","metaKeywords":null},"attributes":{"series":"QorIQ® Layerscape","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"USB":"USB 3.0 (1) + PHY","SATA":"SATA 6Gbps (1)","Speed":"1.2GHz","Series":"QorIQ® Layerscape","Package":"Tray","Ethernet":"GbE (3)","Mounting Type":"Surface Mount","Core Processor":"ARM® Cortex®-A7","Package / Case":"525-FBGA, FCBGA","RAM Controllers":"DDR3L, DDR4","lifecycle_stage":"eol_hot","Security Features":"Secure Boot, TrustZone®","Operating Temperature":"-40°C ~ 105°C","Supplier Device Package":"525-FCPBGA (19x19)","Number of Cores/Bus Width":"2 Core, 32-Bit","Display & Interface Controllers":"2D-ACE"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$67.41","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$67.41000","currency":"USD"},{"qty":10,"price":"$55.06800","currency":"USD"},{"qty":84,"price":"$49.73917","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/f45dcf36da316fbf9080ffaec4375631.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the difference between LS1021AXN7MQB and LS1021AXN7MQA?","answer":"Both are pin-compatible dual-core Cortex-A7 parts in the same 525-FCPBGA package. The -MQB suffix typically indicates a higher speed grade or feature update; the exact delta is in the NXP datasheet revision history. For a board swap, the footprint and DDR3L/DDR4 interface are identical."},{"question":"What are the specifications of LS1021AXN7MQB?","answer":"Dual-core ARM Cortex-A7 at 1.2 GHz, USB 3.0 with PHY, SATA 6 Gbps, three GbE MACs, DDR3L/DDR4 controller, 2D-ACE display controller, Secure Boot and TrustZone, -40°C to 105°C, 525-FCPBGA."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp/LS1021AXN7MQB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp/LS1021AXN7MQB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}