{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LPC54113J128BD64Y","brand":"NXP USA Inc.","brandSlug":"nxp-usa-inc","productSlug":"LPC54113J128BD64Y","canonicalUrl":"https://icboms.com/nxp-usa-inc/LPC54113J128BD64Y","factsUrl":"https://icboms.com/api/mcp/products/LPC54113J128BD64Y","rawCanonicalId":null},"summary":{"shortDescription":"NXP LPC54100 series LPC54113J128BD64Y — 32-bit ARM Cortex-M4/M0+ dual-core MCU, 100MHz, 128KB Flash, 96KB RAM, 48 I/O, USB/SPI/I²C/UART, 12-ch 12-bit ADC, -40°C to 105°C, 1.62V to 3.6V, 64-LQFP (10x10) Tape & Reel.","salesMarkdown":"## Dual-core architecture — what the 100 MHz buys you The NXP LPC54113J128BD64Y is a 32-bit dual-core MCU pairing an ARM Cortex-M4 and a Cortex-M0+, both clocked at 100 MHz. The M4 handles DSP, control loops, and protocol stacks; the M0+ runs background tasks like sensor polling or communication housekeeping without waking the main core. That split keeps active power lower than a single-core part running everything at full speed. 128 KB of Flash and 96 KB of RAM are sized for mid-complexity firmware — enough for a sensor hub or a motor-control node with a modest UI, not a full HMI with graphics buffers. The 48 I/O lines and integrated USB, SPI, I²C, and UART/USART interfaces cover most sensor and actuator connections without external bridge chips. A 12-channel 12-bit ADC handles analog inputs like thermocouples or current-sense resistors. ## Package and supply range Supply range of 1.62 V to 3.6 V lets it run from a single Li-ion cell or a 3.6 V rail without a separate regulator.","metaTitle":"NXP LPC54113J128BD64Y ARM Cortex-M4/M0+ MCU, 100MHz, 128KB Flash","metaDescription":"NXP LPC54113J128BD64Y 32-bit dual-core MCU: Cortex-M4/M0+ at 100MHz, 128KB Flash, 96KB RAM, USB/SPI/I²C/UART, 12-ch 12-bit ADC, -40°C to 105°C, 64-LQFP. Active, available to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Speed":"100MHz","title":"LPC54113J128BD64Y","Series":"LPC54100","Package":"Tape & Reel (TR)","RAM Size":"96K x 8","Core Size":"32-Bit Dual-Core","Peripherals":"Brown-out Detect/Reset, DMA, POR, PWM, WDT","Connectivity":"I²C, SPI, UART/USART, USB","Mounting Type":"Surface Mount","Number of I/O":"48","Core Processor":"ARM® Cortex®-M4/M0+","Package / Case":"64-LQFP","Data Converters":"A/D 12x12b","Oscillator Type":"Internal","Base Product Number":"LPC54113","Program Memory Size":"128KB (128K x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C~105°C(TA)","Supplier Device Package":"64-LQFP (10x10)","Voltage - Supply (Vcc/Vdd)":"1.62V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.4904","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/5af22a78d7e26582afd69b1f6f9446ff.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/LPC54113J128BD64Y/alternatives.json"},"ai":{"faq":[{"question":"What is the maximum clock speed of LPC54113J128BD64Y?","answer":"Both the Cortex-M4 and Cortex-M0+ cores run at 100 MHz."},{"question":"Does LPC54113J128BD64Y have USB connectivity?","answer":"Yes, USB is included in the connectivity set alongside SPI, I²C, and UART/USART."},{"question":"What is the equivalent part for LPC54113J128BD64Y?","answer":"Within the LPC54100 series, other 64-LQFP variants with 48 I/O are pin-compatible; the Flash and RAM sizes differ. No single official second-source alternate is listed, but the family provides drop-in density options."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp-usa-inc/LPC54113J128BD64Y","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp-usa-inc/LPC54113J128BD64Y when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T17:20:20.394Z","lastPublished":"2026-07-11T17:20:20.394Z","indexable":true}}