{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LPC11U67JBD64E","brand":"NXP USA Inc.","brandSlug":"nxp-usa-inc","productSlug":"LPC11U67JBD64E","canonicalUrl":"https://icboms.com/nxp-usa-inc/LPC11U67JBD64E","factsUrl":"https://icboms.com/api/mcp/products/LPC11U67JBD64E","rawCanonicalId":null},"summary":{"shortDescription":"NXP LPC11Uxx series 32-bit ARM Cortex-M0+ MCU, 50 MHz, 128 KB Flash, 20 KB RAM, 4 KB EEPROM, USB 2.0, 48 I/O, 64-LQFP, -40 to 105 °C.","salesMarkdown":"## Cortex-M0+ with USB — what it does on the board The NXP LPC11U67JBD64E is a 32-bit ARM Cortex-M0+ MCU running at 50 MHz, with 128 KB Flash, 20 KB RAM, and 4 KB EEPROM on-chip. The USB device controller lets it handle serial-to-USB bridging, data logging, or HID-class endpoints without an external PHY. At 50 MHz the Cortex-M0+ core delivers enough throughput for real-time control loops and moderate protocol stacks (USB, Modbus, CAN via UART). It is not a DSP-class number — do not expect FFT or motor-field-oriented control at that clock — but for a UART-to-USB bridge, a keypad reader, or a simple PLC I/O slice, 50 MHz leaves headroom without overspending on a Cortex-M4. Status is Active per NXP's product record. ROHS3 compliant. No last-time-buy or end-of-life notice on this order code. ## 48 I/O and 10-channel 12-bit ADC","metaTitle":"NXP LPC11U67JBD64E ARM Cortex-M0+ MCU, 50 MHz, 128 KB Flash, 64-LQFP","metaDescription":"NXP LPC11U67JBD64E 32-bit MCU with USB, 50 MHz Cortex-M0+ core, 128 KB Flash, 20 KB RAM, 4 KB EEPROM. Industrial temp -40 to 105 °C. Active, ROHS3. Sourced to order.","metaKeywords":null},"attributes":{"series":"LPC11Uxx","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Mfr":"NXP USA Inc.","Speed":"50MHz","Series":"LPC11Uxx","Package":"Tray","RAM Size":"20K x 8","Core Size":"32-Bit Single-Core","EEPROM Size":"4K x 8","Peripherals":"Brown-out Detect/Reset, DMA, POR, PWM, WDT","Connectivity":"I²C, Microwire, SPI, SSI, SSP, UART/USART, USB","Mounting Type":"Surface Mount","Number of I/O":"48","Core Processor":"ARM® Cortex®-M0+","Package / Case":"64-LQFP","Product Status":"Active","Data Converters":"A/D 10x12b","Oscillator Type":"Internal","lifecycle_stage":"unknown","Base Product Number":"LPC11","Program Memory Size":"128KB (128K x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"64-LQFP (10x10)","Voltage - Supply (Vcc/Vdd)":"2.4V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$7.4200","priceTiers":[{"qty":1,"price":"$7.42000","currency":"USD"},{"qty":10,"price":"$5.83200","currency":"USD"},{"qty":160,"price":"$4.82819","currency":"USD"},{"qty":960,"price":"$4.21107","currency":"USD"},{"qty":2400,"price":"$4.05512","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/e1b03385a5bd34f631b78c423f5104d1.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/LPC11U67JBD64E/alternatives.json"},"ai":{"faq":[{"question":"Can LPC11U67JBD64E be used with USB?","answer":"Yes, it includes a USB 2.0 device controller — suitable for HID, CDC, or vendor-specific endpoints."},{"question":"What is the operating voltage of LPC11U67JBD64E?","answer":"The supply range is 2.4 V to 3.6 V, typically a 3.3 V rail."},{"question":"What development tools support LPC11U67JBD64E?","answer":"Standard ARM Cortex-M0+ toolchains (Keil MDK, IAR EWARM, GCC with OpenOCD) work. NXP's MCUXpresso IDE and SDK also cover this device."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp-usa-inc/LPC11U67JBD64E","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp-usa-inc/LPC11U67JBD64E when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-16T10:39:33.080Z","lastPublished":"2026-07-16T10:39:33.080Z","indexable":true}}