{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LMK1D2106RHAT","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"LMK1D2106RHAT","canonicalUrl":"https://icboms.com/texas-instruments/LMK1D2106RHAT","factsUrl":"https://icboms.com/api/mcp/products/LMK1D2106RHAT","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments LMK1D2106RHAT Clock Buffer, 2 GHz max frequency, 2:6 fanout, differential I/O, 40-VFQFN Exposed Pad, Tape & Reel.","salesMarkdown":"## High-speed clock distribution for 2 GHz signal chains The LMK1D2106RHAT is a 2:6 clock buffer from Texas Instruments that fans out one or two input clocks to six LVDS outputs at up to 2 GHz — the rate needed for SERDES reference clocks, data converter sampling clocks, and FPGA transceiver fabric distribution. It accepts any of five common differential or single-ended standards — CML, HCSL, LVCMOS, LVDS, or LVPECL — so the same BOM line serves designs where the upstream oscillator or PLL output format is not yet frozen. All six LVDS outputs are differential, so the PCB trace pair must be length-matched and impedance-controlled to 100 ohms differential to preserve signal integrity at 2 GHz edge rates.","metaTitle":"TI LMK1D2106RHAT Clock Buffer, 2 GHz, 2:6 Fanout, 40-VQFN","metaDescription":"Texas Instruments LMK1D2106RHAT clock buffer, 2 GHz max frequency, 2:6 fanout, accepts CML/HCSL/LVCMOS/LVDS/LVPECL inputs. Active production, sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","Type":"Clock Buffer","Input":"CML, HCSL, LVCMOS, LVDS, LVPECL","Output":"Clock, LVDS","Series":"-","Package":"Tape & Reel (TR)","Mounting Type":"Surface Mount","Package / Case":"40-VFQFN Exposed Pad","Product Status":"Active","Frequency - Max":"2 GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"1.71V ~ 1.89V, 2.375V ~ 2.625V, 3.135V ~ 3.465V","Number of Circuits":"2","Ratio - Input:Output":"2:6","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"40-VQFN (6x6)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$11.9009","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/d2603392402ae8421e19556eb231f1f0.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/LMK1D2106RHAT/alternatives.json"},"ai":{"faq":[{"question":"What is the LMK1D2106RHAT used for?","answer":"It is a 2:6 clock buffer that distributes a high-speed reference clock (up to 2 GHz) to six LVDS destinations — ADC/DAC sampling clocks, FPGA transceiver banks, or SERDES PLL reference inputs."},{"question":"What input signal formats does the LMK1D2106RHAT accept?","answer":"It accepts CML, HCSL, LVCMOS, LVDS, and LVPECL — the five most common high-speed clock formats — so it bridges between an oscillator or clock generator and the downstream receivers without external level translation."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/LMK1D2106RHAT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/LMK1D2106RHAT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}