{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LMK04133SQX/NOPB","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"LMK04133SQX-NOPB","canonicalUrl":"https://icboms.com/texas-instruments/LMK04133SQX-NOPB","factsUrl":"https://icboms.com/api/mcp/products/LMK04133SQX%2FNOPB","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments PLLatinum series, LMK04133SQX/NOPB, clock jitter cleaner with PLL, 1.08 GHz max frequency, LVCMOS/LVDS/LVPECL input and output, single circuit, 2:6 input-to-output ratio, differential I/O, 3.15V~3.45V supply, -40°C~85°C, 48-WFQFN exposed pad, surface mount.","salesMarkdown":"## 1.08 GHz PLL with flexible I/O standards The Texas Instruments LMK04133SQX/NOPB is a PLLatinum-series clock jitter cleaner built around a phase-locked loop that runs to 1.08 GHz. That frequency ceiling covers the highest-speed serial data rates in telecom backhaul, base station local oscillators, and test equipment clock trees — the PLL cleans phase noise from a reference while multiplying it to a UHF or microwave output. Input and output standards span LVCMOS, LVDS, LVPECL, and 2VPECL, so the part mates directly with FPGA reference clocks, SerDes reference inputs, and SAW oscillator modules without external level translators. ## Supply rails and thermal pad The supply range is tight at 3.15 V to 3.45 V — a 3.3 V rail with ±5 % tolerance stays inside the window, but a 3.3 V rail that droops to 3.1 V under load will pull the PLL out of lock. The single PLL circuit handles a 2:6 input-to-output ratio, meaning two reference inputs feed six clock outputs — enough to distribute a clean clock to multiple FPGA banks, ADCs, and SerDes transceivers from one device.","metaTitle":"LMK04133SQX/NOPB PLLatinum Clock Jitter Cleaner, 1.08 GHz","metaDescription":"TI LMK04133SQX/NOPB PLLatinum clock jitter cleaner with PLL, 1.08 GHz max frequency, LVCMOS/LVDS/LVPECL I/O, -40 to 85°C, 48-WQFN.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","PLL":"Yes","Input":"LVCMOS, LVDS, LVPECL","Output":"LVCMOS, LVDS, 2VPECL, LVPECL","Series":"PLLatinum™","Package":"Tape & Reel (TR)","Mounting Type":"Surface Mount","Package / Case":"48-WFQFN Exposed Pad","Product Status":"Active","Frequency - Max":"1.08GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.15V ~ 3.45V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Base Product Number":"LMK04133","Ratio - Input:Output":"2:6","Operating Temperature":"-40°C~85°C","Supplier Device Package":"48-WQFN (7x7)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.5440","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/aec93e0b8f1bb03c48d16d6fe0fc53f3.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Is LMK04133SQX/NOPB compatible with LVDS outputs?","answer":"Yes. The device outputs LVDS, LVCMOS, 2VPECL, and LVPECL signals. LVDS outputs are directly compatible with FPGA and SerDes LVDS inputs."},{"question":"What is the difference between LMK04133SQX/NOPB and LMK04133SQ?","answer":"The LMK04133SQX/NOPB is the Tape & Reel packaged variant of the base LMK04133SQ device. The electrical specifications and package (48-WQFN) are identical. The /NOPB suffix indicates lead-free (RoHS) plating. For a reel quantity, order the SQX/NOPB; for tube or tray, order the base SQ variant."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/LMK04133SQX-NOPB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/LMK04133SQX-NOPB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}