{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LMK04110SQ/NOPB","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"LMK04110SQ-NOPB","canonicalUrl":"https://icboms.com/texas-instruments/LMK04110SQ-NOPB","factsUrl":"https://icboms.com/api/mcp/products/LMK04110SQ%2FNOPB","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments PLLatinum™ clock jitter cleaner, PLL Yes, 1.08 GHz max, 2:5 input:output ratio, LVCMOS/LVDS/LVPECL inputs, 2VPECL/LVPECL outputs, 48-WFQFN exposed pad, -40 to 85°C.","salesMarkdown":"## Clock-tree clean-up for 1.08 GHz signal chains The Texas Instruments LMK04110SQ/NOPB is a PLLatinum™ clock jitter cleaner that accepts LVCMOS, LVDS, or LVPECL reference inputs and delivers 2VPECL or LVPECL outputs at frequencies up to 1.08 GHz. It integrates a single PLL with a 2:5 input-to-output ratio, making it a targeted fit for cleaning up jitter on high-speed serial links, ADC/DAC sample clocks, and FPGA reference clocks in base station, test equipment, and communications infrastructure. ## Which exact ordering code covers the package and temperature grade The /NOPB suffix on this ordering code confirms lead-free / RoHS-compliant construction. ## Supply rail and signal interface constraints The supply voltage range is 3.15 V to 3.45 V — a tight 300 mV window that demands a clean, low-noise rail. The PLL accepts differential or single-ended inputs (LVCMOS, LVDS, LVPECL) and outputs differential LVPECL or 2VPECL levels, so the downstream receiver must be terminated for those logic families. The single PLL circuit includes an internal divider (Yes) but no multiplier, meaning the output frequency is a divided-down version of the VCO, not a multiplied reference.","metaTitle":"LMK04110SQ/NOPB PLLatinum Clock Jitter Cleaner, 1.08 GHz","metaDescription":"TI LMK04110SQ/NOPB PLLatinum clock jitter cleaner with 1.08 GHz max frequency, 2:5 input:output ratio, LVCMOS/LVDS/LVPECL inputs, industrial temp range.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","PLL":"Yes","Input":"LVCMOS, LVDS, LVPECL","Output":"2VPECL, LVPECL","Series":"PLLatinum™","Package":"Tape & Reel (TR)","Mounting Type":"Surface Mount","Package / Case":"48-WFQFN Exposed Pad","Product Status":"Active","Frequency - Max":"1.08GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.15V ~ 3.45V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Base Product Number":"LMK04110","Ratio - Input:Output":"2:5","Operating Temperature":"-40°C~85°C","Supplier Device Package":"48-WQFN (7x7)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$9.5040","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/aec93e0b8f1bb03c48d16d6fe0fc53f3.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What input and output logic families does LMK04110SQ/NOPB support?","answer":"The device accepts LVCMOS, LVDS, or LVPECL reference inputs and outputs 2VPECL or LVPECL levels. Both the input and output paths are differential-capable, which is typical for high-frequency clock distribution where single-ended signalling would pick up noise."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/LMK04110SQ-NOPB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/LMK04110SQ-NOPB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}