{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LM3S811-IQN50-C2T","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"LM3S811-IQN50-C2T","canonicalUrl":"https://icboms.com/texas-instruments/LM3S811-IQN50-C2T","factsUrl":"https://icboms.com/api/mcp/products/LM3S811-IQN50-C2T","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments Stellaris ARM Cortex-M3S 800 microcontroller, LM3S811-IQN50-C2T, 32-bit single-core, 50MHz, 64KB Flash, 8KB SRAM, 32 I/O, 48-LQFP, industrial temp.","salesMarkdown":"## Cortex-M3 at 50 MHz — on-chip memory and peripheral mix The LM3S811-IQN50-C2T: On-chip peripherals include a brown-out detect, POR, watchdog timer, and PWM — the BOD and WDT eliminate external supervisor ICs in cost-sensitive control boards. Connectivity interfaces cover I²C, SPI, SSI, Microwire, and UART/USART — the SSI is a synchronous serial interface compatible with National Semiconductor Microwire peripherals, useful for legacy sensor bridges. A 4-channel 10-bit ADC is integrated on the die — for a 10-bit conversion at up to 1 Msps typical of this core, the ADC handles four analog inputs without an external multiplexer. The 32 I/O pins are available in the 48-LQFP package — 48 pins with 32 GPIO leaves 16 pins for power, ground, and dedicated function pins (oscillator, reset, JTAG/SWD). ## NRND — sourcing path and design-in constraint Texas Instruments has designated the LM3S811-IQN50-C2T as NRND (Not Recommended for New Designs) — the part is in its end-of-life transition phase, and TI no longer promotes it for new projects. For new designs, a pin-compatible or functionally equivalent alternative within the Stellaris or Tiva C series should be evaluated — the same 48-LQFP footprint and 3.3V supply rail are common across the family, but the exact peripheral set and memory map vary by derivative.","metaTitle":"TI LM3S811-IQN50-C2T ARM Cortex-M3 MCU, 50MHz, 64KB Flash","metaDescription":"Texas Instruments LM3S811-IQN50-C2T MCU, NRND status. 32-bit ARM Cortex-M3 at 50MHz, 64KB Flash, 8KB SRAM, 32 I/O, -40°C to 85°C, 48-LQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"NRND","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Mfr":"Texas Instruments","Speed":"50MHz","Series":"Stellaris® ARM® Cortex®-M3S 800","Package":"Tape & Reel (TR)","RAM Size":"8K x 8","Core Size":"32-Bit Single-Core","EEPROM Size":"-","Peripherals":"Brown-out Detect/Reset, POR, PWM, WDT","Connectivity":"I²C, Microwire, SPI, SSI, UART/USART","Mounting Type":"Surface Mount","Number of I/O":"32","Core Processor":"ARM® Cortex®-M3","Package / Case":"48-LQFP","Product Status":"Not For New Designs","Data Converters":"A/D 4x10b","Oscillator Type":"Internal","lifecycle_stage":"eol_hot","Base Product Number":"LM3S811","Program Memory Size":"64KB (64K x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"48-LQFP (7x7)","Voltage - Supply (Vcc/Vdd)":"3V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$8.0271","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/dd191d024de65e42450982a8f52c6d32.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/LM3S811-IQN50-C2T/alternatives.json"},"ai":{"faq":[{"question":"What is the core speed and memory configuration of LM3S811-IQN50-C2T?","answer":"The ARM Cortex-M3 core runs at 50 MHz. These are fixed on die — no external memory bus is provided for expansion, so the application code and data must fit within these limits."},{"question":"What interfaces does LM3S811-IQN50-C2T support?","answer":"The MCU has I²C, SPI, SSI, Microwire, and UART/USART serial interfaces. The SSI block is compatible with National Semiconductor Microwire peripherals — relevant for legacy sensor modules or EEPROMs using that protocol."},{"question":"What package does LM3S811-IQN50-C2T come in?","answer":"48-pin LQFP (Low-profile Quad Flat Package) with a 7x7 mm body. The 0.5 mm pitch requires a 4-layer PCB for comfortable fan-out on the inner rows; a 2-layer board is possible but trace routing is tight."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/LM3S811-IQN50-C2T","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/LM3S811-IQN50-C2T when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:57:06.839Z","lastPublished":"2026-07-21T02:57:06.839Z","indexable":true}}