{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LM3S1166-IQC50-A2","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"LM3S1166-IQC50-A2","canonicalUrl":"https://icboms.com/texas-instruments/LM3S1166-IQC50-A2","factsUrl":"https://icboms.com/api/mcp/products/LM3S1166-IQC50-A2","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments Stellaris ARM Cortex-M3S 1000 series LM3S1166-IQC50-A2, 32-bit single-core MCU, 50MHz, 64KB FLASH, 16KB SRAM, 43 I/O, 100-LQFP.","salesMarkdown":"## 50MHz Cortex-M3 with 64KB Flash in a 100-LQFP The LM3S1166-IQC50-A2: It packs 64 KB of flash and 16 KB of SRAM on a single-core die, with 43 general-purpose I/O lines brought out to a 100-pin LQFP (14×14 mm body). ## On-chip peripherals and memory headroom The 64 KB flash and 16 KB SRAM are modest by today's standards — enough for a single control loop, a Modbus RTU stack, or a sensor hub that offloads data via UART. The 4-channel 10-bit ADC (A/D 4x10b) samples analog inputs directly; no external ADC is needed for basic voltage or current sensing. Built-in peripherals include brown-out detect/reset, POR, PWM, and a watchdog timer. The PWM block can drive a small motor or LED dimmer without a dedicated PWM controller. Brown-out reset protects flash integrity during supply dips — useful in battery-powered or loosely regulated 2.5 V rails. The 100-LQFP package (0.5 mm pitch) requires a 4-layer PCB for reliable fan-out of the inner rows. The 14×14 mm footprint is standard for this pin count; thermal dissipation is adequate for the 50 MHz core at industrial temperatures without forced airflow. Texas Instruments has marked the LM3S1166-IQC50-A2 as Obsolete. For a BOM line that requires this exact MCU, the supply posture is quoted-to-order.","metaTitle":"LM3S1166-IQC50-A2 ARM Cortex-M3 MCU, 50MHz, 64KB Flash","metaDescription":"Texas Instruments LM3S1166-IQC50-A2 Stellaris ARM Cortex-M3 MCU, 50MHz, 64KB Flash, 16KB SRAM, 43 I/O. Obsolete — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Speed":"50MHz","title":"LM3S1166-IQC50-A2","Series":"Stellaris® ARM® Cortex®-M3S 1000","Package":"Tray","RAM Size":"16K x 8","Core Size":"32-Bit Single-Core","Peripherals":"Brown-out Detect/Reset, POR, PWM, WDT","Connectivity":"I²C, IrDA, Microwire, SPI, SSI, UART/USART","Mounting Type":"Surface Mount","Number of I/O":"43","Core Processor":"ARM® Cortex®-M3","Package / Case":"100-LQFP","Data Converters":"A/D 4x10b","Oscillator Type":"Internal","lifecycle_stage":"eol_hot","Base Product Number":"LM3S1166","Program Memory Size":"64KB (64K x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-LQFP (14x14)","Voltage - Supply (Vcc/Vdd)":"2.25V ~ 2.75V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/7902984c953e81631620e4ca4e1070a2.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the maximum clock speed of the LM3S1166-IQC50-A2?","answer":"The core runs at 50 MHz. This is the Cortex-M3's rated speed for this device; the flash wait-state profile determines actual throughput at that clock."},{"question":"What compliance documentation does TI provide for the LM3S1166-IQC50-A2?","answer":"The part carries RoHS compliance as standard for TI's Stellaris series."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/LM3S1166-IQC50-A2","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/LM3S1166-IQC50-A2 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:41:36.260Z","lastPublished":"2026-07-21T02:41:36.260Z","indexable":true}}