{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"LC4032V-10TN48I","brand":"Lattice Semiconductor Corporation","brandSlug":"lattice-semiconductor-corporation","productSlug":"LC4032V-10TN48I","canonicalUrl":"https://icboms.com/lattice-semiconductor-corporation/LC4032V-10TN48I","factsUrl":"https://icboms.com/api/mcp/products/LC4032V-10TN48I","rawCanonicalId":null},"summary":{"shortDescription":"Lattice Semiconductor ispMACH® 4000V CPLD, LC4032V-10TN48I, 32 macrocells, 10 ns tpd, 32 I/O, 48-TQFP, industrial temp -40°C to 105°C.","salesMarkdown":"## 32-macrocell CPLD with 10 ns pin-to-pin delay The LC4032V-10TN48I is a 32-macrocell CPLD from Lattice's ispMACH 4000V family, offering 32 I/O pins and a propagation delay of 10 ns max. That 10 ns tpd sets the combinatorial logic ceiling — any path through the device must settle within that window, which means it handles glue logic, address decoding, or state machines running up to about 80-100 MHz in a typical synchronous design. The footprint is the same as many other 48-pin Lattice CPLDs, so a board laid out for the 7.5 ns variant (LC4032V-75TN48I) accepts this 10 ns part without a layout change. It ships in a tray, not tape-and-reel, which is typical for this package size — the tray keeps the leads aligned during handling and reflow. In-system programmable via JTAG — no separate programmer voltage needed; the 3.3 V supply is enough for the programming algorithm, which simplifies board-level rework and field updates.","metaTitle":"Lattice LC4032V-10TN48I CPLD, 32 Macrocells, 10 ns, 48-TQFP","metaDescription":"Lattice LC4032V-10TN48I ispMACH 4000V CPLD with 32 macrocells, 10 ns tpd, 32 I/O, industrial temp. Active production, ROHS3. Request a quote.","metaKeywords":null},"attributes":{"series":"ispMACH® 4000V","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Lattice Semiconductor Corporation","Series":"ispMACH® 4000V","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"32","Package / Case":"48-LQFP","Product Status":"Active","lifecycle_stage":"unknown","Programmable Type":"In System Programmable","Base Product Number":"LC4032","Number of Macrocells":"32","Delay Time tpd(1) Max":"10 ns","Operating Temperature":"-40°C ~ 105°C (TJ)","Supplier Device Package":"48-TQFP (7x7)","Voltage Supply - Internal":"3V ~ 3.6V","Number of Logic Elements/Blocks":"2"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$3.8000","priceTiers":[{"qty":1,"price":"$3.80000","currency":"USD"},{"qty":25,"price":"$3.30000","currency":"USD"},{"qty":100,"price":"$3.18500","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/5380f8194be8321b03225a3946464ecb.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/LC4032V-10TN48I/alternatives.json"},"ai":{"faq":[{"question":"Will the LC4032V-10TN48I drop into a board designed for the LC4032V-75TN48I?","answer":"Yes — both parts share the same 48-TQFP footprint, same 32 I/O count, and same supply voltage range. The only difference is the propagation delay: 10 ns vs 7.5 ns. If the design's timing closure was already met with 10 ns, the swap is pin-for-pin and functional."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/lattice-semiconductor-corporation/LC4032V-10TN48I","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/lattice-semiconductor-corporation/LC4032V-10TN48I when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}