{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"ICE40LP8K-CM225","brand":"Lattice Semiconductor Corporation","brandSlug":"lattice-semiconductor-corporation","productSlug":"ICE40LP8K-CM225","canonicalUrl":"https://icboms.com/lattice-semiconductor-corporation/ICE40LP8K-CM225","factsUrl":"https://icboms.com/api/mcp/products/ICE40LP8K-CM225","rawCanonicalId":null},"summary":{"shortDescription":"Lattice Semiconductor Corporation iCE40™ LP FPGA, 7680 logic cells, 178 I/O, 128 Kbit SRAM, 225-VFBGA package, -40°C to +100°C, ROHS3 compliant.","salesMarkdown":"## Logic density and I/O budget The ICE40LP8K-CM225 packs 7680 logic cells (960 LABs/CLBs) and 128 Kbit of embedded SRAM — enough for sensor fusion glue logic, a small state machine, or bridging a parallel bus to a serial peripheral without an external FIFO. 225-VFBGA (also designated 225-UCBGA) — 7×7 mm array, 0.5 mm ball pitch. The outer two ball rows route on the top layer; inner rows need at least a four-layer stack with 0.2 mm via capture pads and a 0.1 mm trace/space rule. Surface-mount only — no socketed option. The package ships in trays; the 0.5 mm pitch demands a stencil aperture of 0.3 mm square for a 1:1 ball-to-pad ratio to avoid solder bridging.","metaTitle":"ICE40LP8K-CM225 Lattice iCE40 LP FPGA, 7680 LEs, 178 I/O","metaDescription":"Active Lattice iCE40 LP FPGA with 7680 logic cells, 178 I/O, 128 Kbit SRAM. Industrial temp -40 to +100°C. 225-VFBGA. Quoted to order per RFQ.","metaKeywords":null},"attributes":{"series":"iCE40™ LP","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Lattice Semiconductor Corporation","Series":"iCE40™ LP","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"178","Package / Case":"225-VFBGA","Product Status":"Active","Total RAM Bits":"131072","lifecycle_stage":"unknown","Voltage - Supply":"1.14V ~ 1.26V","Base Product Number":"ICE40","Number of LABs/CLBs":"960","Operating Temperature":"-40°C ~ 100°C (TJ)","Supplier Device Package":"225-UCBGA (7x7)","Number of Logic Elements/Cells":"7680"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$15.1500","priceTiers":[{"qty":1,"price":"$15.15000","currency":"USD"},{"qty":25,"price":"$13.20000","currency":"USD"},{"qty":100,"price":"$12.67500","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/d18c7edb8fd28a80a280c2cb87a0725a.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/ICE40LP8K-CM225/alternatives.json"},"ai":{"faq":[{"question":"What is the closest functional alternative — ICE40LP8K-CM121 or ICE40HX8K-CT256?","answer":"The ICE40LP8K-CM121 is the same LP logic fabric (7680 cells, 128 Kbit SRAM) in a 121-ball package with 93 I/O — a direct drop-in for the core but with 85 fewer I/O pins. The ICE40HX8K-CT256 uses the HX architecture with 206 I/O in a 256-ball CTBGA; it is pin-incompatible and requires a different bitstream. The CM121 is the only peer that shares the LP power profile and the same die."},{"question":"Will ICE40LP8K-CM225 drop into a board routed for ICE40LP8K-CM121 without rewiring?","answer":"No — the CM225 is a 225-ball VFBGA (7×7 mm, 0.5 mm pitch) while the CM121 is a 121-ball VFBGA (6×6 mm, 0.5 mm pitch). The ball maps are different; a board designed for the CM121 cannot accept the CM225 without a layout revision."},{"question":"What compliance documentation does Lattice provide for ICE40LP8K-CM225?","answer":"RoHS3 compliance is confirmed per."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/lattice-semiconductor-corporation/ICE40LP8K-CM225","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/lattice-semiconductor-corporation/ICE40LP8K-CM225 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}