{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"EPM570T144C5","brand":"Intel","brandSlug":"intel","productSlug":"EPM570T144C5","canonicalUrl":"https://icboms.com/intel/EPM570T144C5","factsUrl":"https://icboms.com/api/mcp/products/EPM570T144C5","rawCanonicalId":null},"summary":{"shortDescription":"Intel MAX II CPLD, EPM570T144C5, 440 macrocells, 5.4 ns pin-to-pin delay, 116 I/O, 144-LQFP, 2.5V/3.3V, 0-85°C.","salesMarkdown":"## 440 macrocells at 5.4 ns — the logic-density fit The Intel EPM570T144C5 is a MAX II CPLD packing 440 macrocells with a 5.4 ns maximum pin-to-pin propagation delay (tpd1). That delay is the combinatorial path from any input through the logic array to any output — for a 50 MHz bus bridge, the 5.4 ns ceiling leaves about 14 ns of the 20 ns cycle for external setup and hold after the CPLD's own delay is consumed. The 570 logic elements back the macrocell count with fine-grain routing, so a 16-bit address decoder plus a 4-state sequencer fits without splitting across multiple devices. ## 144-LQFP with 116 user I/O — board integration The 0.5 mm pitch demands a 4-layer PCB for reliable fan-out on the inner rows — two-layer boards will struggle with escape routing on the full I/O count. ## Dual supply and in-system programming In-system programmable via the JTAG interface (IEEE 1149.1), the device is configured on the board without a socket or external programmer; the 4-pin JTAG header consumes four of the 116 I/O unless boundary-scan is used. Programming is supported in Quartus Prime — the device ID is recognized by the software's device list for the MAX II family.","metaTitle":"Intel EPM570T144C5 MAX II CPLD, 440 macrocells, 5.4 ns","metaDescription":"Intel EPM570T144C5 MAX II CPLD, 440 macrocells, 5.4 ns tpd, 116 I/O, 144-LQFP. Active lifecycle.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Intel","Series":"MAX® II","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"116","Package / Case":"144-LQFP","Product Status":"Active","lifecycle_stage":"eol_hot","Programmable Type":"In System Programmable","Base Product Number":"EPM570","Number of Macrocells":"440","Delay Time tpd(1) Max":"5.4 ns","Operating Temperature":"0°C~85°C(TJ)","Supplier Device Package":"144-TQFP (20x20)","Voltage Supply - Internal":"2.5V, 3.3V","Number of Logic Elements/Blocks":"570"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$300.0000","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"Can the EPM570T144C5 be programmed with Quartus Prime?","answer":"Yes, the device is supported in Intel Quartus Prime software. The JTAG-based in-system programming interface is recognized by the device list for the MAX II family."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/intel/EPM570T144C5","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/intel/EPM570T144C5 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}