{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"EPM570M256I5N","brand":"Intel","brandSlug":"intel","productSlug":"EPM570M256I5N","canonicalUrl":"https://icboms.com/intel/EPM570M256I5N","factsUrl":"https://icboms.com/api/mcp/products/EPM570M256I5N","rawCanonicalId":null},"summary":{"shortDescription":"Intel MAX II CPLD, EPM570M256I5N, 440 macrocells, 570 logic elements, 160 I/O, 5.4 ns tpd, -40 to 100°C, 256-TFBGA, Tray.","salesMarkdown":"## 440 macrocells, 5.4 ns pin-to-pin — the logic-density decision The Intel EPM570M256I5N is a MAX II CPLD packing 440 macrocells and 570 logic elements in a 256-ball MBGA (11x11 mm) footprint. That 5.4 ns max propagation delay (tpd1) sets the combinatorial path ceiling — glue logic that must resolve within one clock edge at 100+ MHz needs this speed grade, not the slower 7 ns variant in the same family. With 160 user I/O distributed across the 256-TFBGA, the part fits medium-density bus interfaces and memory controllers where a smaller 80-I/O MAX II (EPM240) would force a board spin. ## Dual-supply routing and in-system programming The core runs on 2.5 V while the I/O banks accept 3.3 V — a common split for bridging a 2.5 V FPGA core to 3.3 V peripherals without external level shifters. The supply rails must be sequenced per Intel's MAX II power-up guidelines; the device is in-system programmable via the JTAG interface, so firmware updates happen on the assembled board through the standard 10-pin header. The 256-MBGA (11x11 mm) uses a 0.80 mm ball pitch — a 4-layer PCB with via-in-pad or dogbone fan-out handles the breakout without microvias. The exposed center pad (if present on this variant) should be stitched to the ground plane with at least 9 thermal vias to keep the junction temperature below the 100°C ceiling under continuous operation. ## Active lifecycle — no last-time-buy pressure The MAX II family is mature but still supported; Intel's Quartus Prime software (free edition) targets this device without a license key. For a BOM that already qualified the 256-MBGA footprint, the closest sibling is the MAX V 5M570ZF256I5N — same 440 macrocells and 570 LEs, same -40°C to 100°C range, but with a 1.8 V core instead of 2.5 V/3.3 V and a 9 ns tpd (slower). The pinout is not identical; a board respin is required to migrate between the two families.","metaTitle":"Intel EPM570M256I5N MAX II CPLD, 440 macrocells, 5.4 ns","metaDescription":"Intel EPM570M256I5N MAX II CPLD: 440 macrocells, 570 LEs, 160 I/O, 5.4 ns tpd, -40 to 100°C, 256-MBGA. Active production, sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Intel","Series":"MAX® II","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"160","Package / Case":"256-TFBGA","Product Status":"Active","lifecycle_stage":"eol_hot","Programmable Type":"In System Programmable","Base Product Number":"EPM570","Number of Macrocells":"440","Delay Time tpd(1) Max":"5.4 ns","Operating Temperature":"-40°C~100°C(TJ)","Supplier Device Package":"256-MBGA (11x11)","Voltage Supply - Internal":"2.5V, 3.3V","Number of Logic Elements/Blocks":"570"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$69.0000","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"Is EPM570M256I5N obsolete or still active?","answer":"Active."},{"question":"What is the difference between EPM570M256I5N and EPM570M256C5N?","answer":"The temperature grade. All other parametrics — 440 macrocells, 570 LEs, 160 I/O, 5.4 ns tpd, 256-MBGA package — are identical between the two order codes."},{"question":"Can EPM570M256I5N be programmed with Quartus Prime?","answer":"Yes. The free Quartus Prime Lite Edition includes device support for the MAX II family, including EPM570. Programming is done through the standard JTAG interface using a USB-Blaster or compatible download cable."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/intel/EPM570M256I5N","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/intel/EPM570M256I5N when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}