{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"EPM1270T144C5N","brand":"Intel","brandSlug":"intel","productSlug":"EPM1270T144C5N","canonicalUrl":"https://icboms.com/intel/EPM1270T144C5N","factsUrl":"https://icboms.com/api/mcp/products/EPM1270T144C5N","rawCanonicalId":null},"summary":{"shortDescription":"Intel MAX® II CPLD, EPM1270T144C5N, 1270 logic elements, 980 macrocells, 6.2 ns tpd(1) max, 116 I/O, 144-LQFP, 2.5V/3.3V, 0°C to 85°C, Tray.","salesMarkdown":"## Active production — no allocation pressure on this MAX II CPLD The EPM1270T144C5N: Where is it in the cycle? Still in the middle of its production run. The MAX II family is mature but not retired, so the spot premium over franchised price stays thin unless a wider CPLD shortage tightens supply across all densities. ## Logic density and speed — where the 6.2 ns tpd sets the ceiling 1270 logic elements and 980 macrocells give this CPLD enough fabric to absorb a handful of 8-bit address decoders, state machines, and bus-interface glue without needing a larger FPGA — the 116 user I/O in the 144-LQFP package is the pin-limited bottleneck, not the logic. The 6.2 ns tpd(1) max is the combinatorial propagation delay from any input through one level of logic to any output — at this speed grade (C5) the part can latch a 50 MHz bus without violating setup/hold on the downstream device, but the pin-to-pin delay through two macrocell levels stacks to roughly 12.4 ns and eats into the timing budget for multi-level decode paths. ## In-system programmability and package rework In-system programmable via JTAG — the part arrives blank and gets configured on the board after reflow, so there is no pre-programming inventory split and no socket burn-in step. The 144-TQFP (20x20) package has a 0.5 mm pitch — reworkable with a standard hot-air nozzle and no BGA underfill.","metaTitle":"Intel EPM1270T144C5N MAX II CPLD, 980 macrocells, 6.2 ns","metaDescription":"Intel MAX II CPLD, 1270 logic elements, 980 macrocells, 6.2 ns tpd, 116 I/O, 144-LQFP. Active production. Sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Intel","Series":"MAX® II","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"116","Package / Case":"144-LQFP","Product Status":"Active","lifecycle_stage":"eol_hot","Programmable Type":"In System Programmable","Base Product Number":"EPM1270","Number of Macrocells":"980","Delay Time tpd(1) Max":"6.2 ns","Operating Temperature":"0°C~85°C(TJ)","Supplier Device Package":"144-TQFP (20x20)","Voltage Supply - Internal":"2.5V, 3.3V","Number of Logic Elements/Blocks":"1270"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$218.4000","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"What is the difference between EPM1270T144C5N and EPM1270T144C4N?","answer":"The speed grade suffix — C5 vs C4 — indicates the tpd(1) max propagation delay. The C5 variant has a 6.2 ns tpd(1) max, while the C4 is a faster speed grade. All other parametrics (logic density, I/O count, package, supply voltage) are identical between the two order codes."},{"question":"What is the pinout for EPM1270T144C5N?","answer":"The pinout is defined by the 144-TQFP (20x20) package footprint and the MAX II device family. The 116 user I/O are mapped to specific pins in the Intel MAX II device handbook; the remaining pins are dedicated to JTAG (TCK, TMS, TDI, TDO), power (VCCINT, VCCIO), and ground (GND). No pinout detail is reproduced here — the official Intel pinout table must be referenced for board layout."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/intel/EPM1270T144C5N","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/intel/EPM1270T144C5N when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}