{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"EPM1270M256C4N","brand":"Intel","brandSlug":"intel","productSlug":"EPM1270M256C4N","canonicalUrl":"https://icboms.com/intel/EPM1270M256C4N","factsUrl":"https://icboms.com/api/mcp/products/EPM1270M256C4N","rawCanonicalId":null},"summary":{"shortDescription":"Altera MAX® II CPLD, EPM1270M256C4N, 980 macrocells, 212 I/O, 6.2 ns pin-to-pin delay, 2.5V/3.3V supply, 256-MBGA (11x11), 0°C to 85°C, Tray.","salesMarkdown":"## 6.2 ns pin-to-pin delay – what it buys you The 6.2 ns tpd1 max means the combinatorial path from any input pin through the logic array to any output pin settles in under 6.2 ns. ## EOL hot – last-time-buy window is open The EPM1270M256C4N is flagged eol_hot — Altera (now Intel) has announced end-of-life, and the last-time-buy window is active. ## JTAG programming – standard 4-wire interface Yes, this part is in-system programmable via the standard JTAG interface (TCK, TMS, TDI, TDO). Any Altera-compatible JTAG programmer (USB-Blaster, ByteBlaster) works. The MAX II family supports the Jam STAPL file format for field updates. No special voltage levels needed — the JTAG pins operate at the VCCIO voltage of the bank they are in. Because the part is in its last-time-buy phase, lead times and available quantities vary — an RFQ is the fastest way to get a firm picture.","metaTitle":"Altera EPM1270M256C4N MAX II CPLD, 980 macrocells, 6.2 ns","metaDescription":"Altera MAX II CPLD EPM1270M256C4N: 980 macrocells, 212 I/O, 6.2 ns pin-to-pin delay, 2.5V/3.3V supply, 256-MBGA. EOL hot – sourced to order. Request quote.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"Intel","Series":"MAX® II","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"212","Package / Case":"256-TFBGA","Product Status":"Active","lifecycle_stage":"eol_hot","Programmable Type":"In System Programmable","Base Product Number":"EPM1270","Number of Macrocells":"980","Delay Time tpd(1) Max":"6.2 ns","Operating Temperature":"0°C~85°C(TJ)","Supplier Device Package":"256-MBGA (11x11)","Voltage Supply - Internal":"2.5V, 3.3V","Number of Logic Elements/Blocks":"1270"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$156.0000","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null},"ai":{"faq":[{"question":"Where can I buy EPM1270M256C4N?","answer":"EPM1270M256C4N is sourced and quoted to order against an RFQ through independent distribution. Submit an RFQ for current availability and pricing."},{"question":"Can EPM1270M256C4N be programmed with a standard JTAG programmer?","answer":"Yes, the EPM1270M256C4N is in-system programmable via the standard 4-wire JTAG interface (TCK, TMS, TDI, TDO). Any Altera-compatible JTAG programmer such as the USB-Blaster works."},{"question":"What is EPM1270M256C4N's listed series?","answer":"The EPM1270M256C4N belongs to the MAX II series from Altera (now Intel)."},{"question":"What is EPM1270M256C4N's listed package?","answer":"The EPM1270M256C4N is supplied in a Tray and packaged in a 256-TFBGA (256-ball MBGA, 11x11 mm) for surface-mount assembly."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/intel/EPM1270M256C4N","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/intel/EPM1270M256C4N when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}