{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C2565KV18-450BZC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C2565KV18-450BZC","canonicalUrl":"https://icboms.com/infineon/CY7C2565KV18-450BZC","factsUrl":"https://icboms.com/api/mcp/products/CY7C2565KV18-450BZC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C2565KV18-450BZC QDR II+ SRAM, 72Mbit, 450 MHz, 2M x 36, 1.7-1.9V, 165-FBGA, Tray.","salesMarkdown":"## 72 Mbit QDR II+ at 450 MHz — the throughput ceiling The CY7C2565KV18-450BZC is a 72 Mbit synchronous SRAM organized as 2M x 36, clocked at 450 MHz on the QDR II+ interface. The 36-bit wide data bus delivers 3.6 GB/s peak bandwidth — the limiting factor in a packet buffer or lookup table is the controller's own port count, not the memory's data rate. The 1.7 V to 1.9 V supply rail means this part runs on a nominal 1.8 V plane. That narrow window demands a clean rail — a switching regulator with less than 3% ripple is fine; a noisy point-of-load converter without enough output capacitance will push the supply out of spec and cause read/write failures at speed. For a BOM that already carries this footprint and supply voltage, the immediate concern is date code consistency across a production batch. When requesting a quote, specify the acceptable date code window and whether the parts need to come from a single lot to avoid timing skew across the bus. ## 165-ball FBGA — the board-level constraint If the system sees an enclosure that hits 60°C internal ambient, the 70°C ceiling leaves only 10°C margin before the part is outside its rated operating range.","metaTitle":"CY7C2565KV18-450BZC QDR II+ SRAM, 72Mbit, 450 MHz, Obsolete","metaDescription":"Infineon CY7C2565KV18-450BZC QDR II+ SRAM, 72Mbit, 450 MHz clock, 2M x 36, 1.7-1.9V, 165-FBGA. Obsolete — sourced to order. Request a quote.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II+","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Obsolete","Clock Frequency":"450 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C2565","Memory Organization":"2M x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/f00f3e58b938cd7e8a6da25ca706e0cb.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization and interface of CY7C2565KV18-450BZC?","answer":"It is a 72 Mbit QDR II+ synchronous SRAM organized as 2M x 36 with a parallel interface. The 36-bit wide data bus and 450 MHz clock are designed for high-bandwidth applications like network packet buffers and telecom line cards."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C2565KV18-450BZC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C2565KV18-450BZC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:17:20.989Z","lastPublished":"2026-07-21T02:17:20.989Z","indexable":true}}