{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C199CN-25PXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C199CN-25PXC","canonicalUrl":"https://icboms.com/infineon/CY7C199CN-25PXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C199CN-25PXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C199CN-25PXC, 256Kbit asynchronous SRAM, 32K x 8 organization, 25 ns access time, 4.5V–5.5V supply, 28-PDIP, 0°C to 70°C.","salesMarkdown":"The Infineon CY7C199CN-25PXC is a 256Kbit asynchronous SRAM organized as 32K x 8 bits, with a 25 ns access time. Typical applications include cache buffers, scratchpad memory, and configuration storage in embedded controllers, telecom line cards, and industrial test equipment where a fast, simple memory interface is needed without the complexity of DRAM refresh or serial latency. The 25 ns access time means the SRAM presents valid data within 25 ns of the address being stable. For a system running a 20 MHz bus (50 ns cycle), this leaves 25 ns of setup margin before the next clock edge — enough for most 8-bit and 16-bit microcontrollers without wait states. ## 5V-only supply — not a 3.3V drop-in This part operates from 4.5V to 5.5V, so it cannot be used directly in a 3.3V system without level shifters on address, data, and control lines. The 5V supply rail also means the I/O levels are TTL-compatible at the input thresholds but swing rail-to-rail on outputs — check the host's input tolerance before connecting to a 3.3V controller. ## 28-PDIP through-hole — legacy footprint, socket-friendly The 28-pin PDIP (0.300\" body width) is a standard through-hole package that fits sockets or can be soldered directly into plated through-holes. For rework and prototyping, this is the easiest package to handle — no hot-air, no stencil. The 0.100\" pitch matches breadboard and perfboard layouts, which is useful for repair and retrofit work on older equipment.","metaTitle":"Infineon CY7C199CN-25PXC 256Kbit Async SRAM, 25 ns, 28-PDIP","metaDescription":"CY7C199CN-25PXC 256Kbit (32K x 8) asynchronous SRAM with 25 ns access time. 5V supply, 28-PDIP, 0°C to 70°C.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tube","Technology":"SRAM - Asynchronous","Access Time":"25 ns","Memory Size":"256Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Through Hole","Package / Case":"28-DIP (0.300\\\", 7.62mm)","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C199","Memory Organization":"32K x 8","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"28-PDIP","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/002e486065fa853fa472de9cc9c294da.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the access time and memory organization of the CY7C199CN-25PXC?","answer":"The access time is 25 ns, and the memory is organized as 32K x 8 bits (256Kbit total). Both read and write cycle times are 25 ns."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C199CN-25PXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C199CN-25PXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}