{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1613KV18-300BZXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1613KV18-300BZXC","canonicalUrl":"https://icboms.com/infineon/CY7C1613KV18-300BZXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1613KV18-300BZXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1613KV18-300BZXC QDR II synchronous SRAM, 144 Mbit (8M x 18), 300 MHz clock, 1.7V-1.9V supply, 165-ball FBGA, tray.","salesMarkdown":"## 144 Mbit QDR II SRAM at 300 MHz — bandwidth budget for the line The CY7C1613KV18-300BZXC is a 144 Mbit synchronous SRAM using the QDR II architecture, organized as 8M x 18 bits. The 300 MHz clock rate delivers a peak read bandwidth of 5.4 Gbit/s per port on the parallel bus interface — the limiting factor in a high-throughput lookup table or packet buffer is the I/O timing closure at this frequency, not the core array access. Operates from a 1.7 V to 1.9 V core supply — the 200 mV tolerance window demands a tightly regulated rail, typically from a dedicated LDO or a point-of-load converter with less than 1% set-point error. The 165-ball FBGA package (15 mm x 17 mm body) uses a 1.0 mm ball pitch. The four-layer PCB minimum for fan-out is a board-stack constraint — the inner signal layers must carry the QDR II address and data buses with matched-length routing to maintain the 300 MHz timing budget.","metaTitle":"CY7C1613KV18-300BZXC Infineon QDR II SRAM, 144Mbit, 300 MHz","metaDescription":"Infineon CY7C1613KV18-300BZXC QDR II synchronous SRAM, 144Mbit (8M x 18), 300 MHz clock, 1.7V-1.9V, 165-FBGA. Active production, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II","Memory Size":"144Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Active","Clock Frequency":"300 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1613","Memory Organization":"8M x 18","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"165-FBGA (15x17)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$253.1400","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/2c7c4b4b97c431e16926886b8fc71e31.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization of CY7C1613KV18-300BZXC?","answer":"It is organized as 8M words by 18 bits, for a total of 144 Mbit. The 18-bit data bus width suits applications needing a parity or ECC bit per 16-bit word without doubling the bus."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1613KV18-300BZXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1613KV18-300BZXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}