{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1565KV18-400BZXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1565KV18-400BZXI","canonicalUrl":"https://icboms.com/infineon/CY7C1565KV18-400BZXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1565KV18-400BZXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon/Cypress CY7C1565KV18-400BZXI, QDR II+ synchronous SRAM, 72Mbit (2M x 36), 400 MHz clock, parallel interface, 1.7V-1.9V supply, -40°C to 85°C, 165-ball FBGA (13x15 mm), tray.","salesMarkdown":"## 72Mbit QDR II+ SRAM at 400 MHz — memory selection memo It operates from a 1.7V to 1.9V core supply and clocks at 400 MHz, delivering back-to-back read and write transactions on separate data ports without bus-turnaround dead cycles. At 400 MHz, the QDR II+ interface delivers a peak data rate of 14.4 Gbps per device (36-bit bus at double data rate). The parallel memory interface means the address and control signals must be routed with matched trace lengths and controlled impedance on the PCB. The 165-ball FBGA package (13x15 mm) provides enough signal and ground balls to keep the return path clean at this frequency. Expect to budget at least four decoupling capacitors per supply pin group within 5 mm of the package. ## Industrial temperature grade — deployment envelope The 1.7V to 1.9V supply range aligns with modern 1.8V core logic families, but verify your system's supply tolerance — a 1.8V rail with ±5% regulation stays within the window; a 1.8V rail with ±10% does not. Listed as Active, meaning Infineon continues production. The base product number CY7C1565 covers multiple speed and temperature variants, so if the 400 MHz industrial grade is the target, the -400BZXI suffix locks in that exact combination. ## Package and mounting — layout checklist Surface-mount 165-ball FBGA with a 13x15 mm body.","metaTitle":"CY7C1565KV18-400BZXI QDR II+ SRAM, 72Mbit, 400 MHz, 165-FBGA","metaDescription":"Infineon/Cypress CY7C1565KV18-400BZXI is a 72Mbit synchronous QDR II+ SRAM organized 2M x 36, clocked at 400 MHz, in a 165-FBGA package.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II+","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Active","Clock Frequency":"400 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1565","Memory Organization":"2M x 36","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$123.8000","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/cec647a6a4aca07f88a1285e6683c70e.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1565KV18-400BZXI/alternatives.json"},"ai":{"faq":[{"question":"What are the alternatives for CY7C1565KV18-400BZXI?","answer":"Within the same QDR II+ family, Infineon offers density and speed variants under the base number CY7C1565. Pin-compatible alternatives would share the same 165-FBGA footprint and 1.7V-1.9V supply but differ in clock speed or temperature grade. Verify the exact ordering code suffix for your speed and temperature requirements."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1565KV18-400BZXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1565KV18-400BZXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}