{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1515KV18-300BZXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1515KV18-300BZXI","canonicalUrl":"https://icboms.com/infineon/CY7C1515KV18-300BZXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1515KV18-300BZXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1515KV18-300BZXI SRAM, Synchronous QDR II, 72Mbit (2M x 36), 300 MHz, 1.7V~1.9V, -40°C~85°C, 165-LBGA, Tray.","salesMarkdown":"## 72 Mbit QDR II SRAM at 300 MHz — BOM-fit note The CY7C1515KV18-300BZXI is a 72 Mbit QDR II synchronous SRAM organised as 2M x 36, clocked at 300 MHz. The parallel interface delivers read and write data on both clock edges, so the effective data rate is 600 MT/s per I/O pin. The 1.7 V to 1.9 V core supply keeps the I/O within the 1.8 V logic family — a design that already runs a 1.8 V backplane or FPGA bank avoids a separate regulator. ## 300 MHz clock and 2M x 36 organisation — what they mean for the memory controller At 300 MHz the QDR II interface demands tight timing closure on the PCB. The 36-bit data word (2M x 36) means the part writes or reads 36 bits per clock edge — 72 bits per full cycle. A controller that expects a 36-bit bus width matches this part without ganging multiple devices. The 165-FBGA package (13x15 mm) uses a 1.0 mm ball pitch — a standard 4-layer PCB with via-in-pad or dog-bone fan-out handles the routing. The supply voltage tolerance (1.7 V to 1.9 V) gives the regulator about 100 mV of margin on a nominal 1.8 V rail, which is enough to absorb IR drop across the board without a local LDO. ## Active lifecycle — sourcing posture Infineon lists this part as Active. The base product number CY7C1515 covers the family; the suffix KV18-300BZXI identifies the 1.8 V, 300 MHz, industrial-temperature, 165-FBGA variant.","metaTitle":"CY7C1515KV18-300BZXI SRAM, 72Mbit, 300 MHz, QDR II, 165-FBGA","metaDescription":"Infineon CY7C1515KV18-300BZXI 72Mbit QDR II SRAM, 300 MHz clock, 1.7-1.9V, -40 to 85°C, 165-FBGA. Active production, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Active","Clock Frequency":"300 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1515","Memory Organization":"2M x 36","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$180.1100","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/fecc7e54873197095792ce9e146235b1.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1515KV18-300BZXI/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organisation of the CY7C1515KV18-300BZXI?","answer":"It is organised as 2M x 36 — 2 million addresses, each storing 36 bits. The 36-bit word width matches a typical 36-bit or 72-bit (two-device) memory bus without wasting pins."},{"question":"What supply voltage does the CY7C1515KV18-300BZXI require?","answer":"It operates from 1.7 V to 1.9 V, making it a native 1.8 V part. The core and I/O share the same rail — no separate VDDQ supply is needed."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1515KV18-300BZXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1515KV18-300BZXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}