{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1481BV33-133BZI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1481BV33-133BZI","canonicalUrl":"https://icboms.com/infineon/CY7C1481BV33-133BZI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1481BV33-133BZI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1481BV33-133BZI synchronous SRAM, 72Mbit (2M x 36), 133 MHz clock, 6.5 ns access, 3.135V–3.6V supply, -40 to 85°C, 165-FBGA (15x17 mm), Tray.","salesMarkdown":"## 72Mbit synchronous SRAM in a 165-ball BGA The CY7C1481BV33-133BZI: The 36-bit-wide datapath maps directly to 32-bit or 36-bit memory buses without external muxing — common in network processors, baseband ASICs, and high-end FPGA designs that need a wide, fast scratchpad. Packaged in a 165-ball FBGA (15x17 mm), it is a fine-pitch BGA requiring controlled reflow and X-ray inspection for void-free solder joints. ## Supply and timing margins for the BOM Supply voltage spans 3.135V to 3.6V — a 3.3V nominal rail with ±5% tolerance covers the full operating envelope. The parallel memory interface uses a standard synchronous protocol (SDR) — no DDR strobe or source-synchronous clocking, so the board layout is simpler than a DDR SRAM but throughput is limited to one data transfer per clock edge. For a 133 MHz bus, peak bandwidth is 133 MT/s per pin, or 4.8 GB/s across the 36-bit data bus. ## Obsolete — sourcing through independent channels Sourcing is per-RFQ — each lot is verified for authenticity, date code, and condition before shipment. No pin-compatible drop-in replacement from Infineon has been published; a board-level redesign may be required if a functional equivalent is needed.","metaTitle":"Infineon CY7C1481BV33-133BZI SRAM, 72Mbit, 133 MHz, 165-FBGA","metaDescription":"CY7C1481BV33-133BZI synchronous SRAM, 72Mbit (2M x 36), 133 MHz, 6.5 ns access, -40 to 85°C, 165-FBGA. Obsolete — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"6.5 ns","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Obsolete","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1481","Memory Organization":"2M x 36","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"165-FBGA (15x17)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$190.1200","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/69014247f19dba4889d85c4f77a7ef23.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1481BV33-133BZI/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization of CY7C1481BV33-133BZI?","answer":"The SRAM is organized as 2M words by 36 bits, giving a total of 72 Mbit. The 36-bit width suits systems with a 32-bit datapath plus parity or ECC bits."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1481BV33-133BZI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1481BV33-133BZI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-20T10:55:38.821Z","lastPublished":"2026-07-20T10:55:38.821Z","indexable":true}}