{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1471BV33-133AXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1471BV33-133AXC","canonicalUrl":"https://icboms.com/infineon/CY7C1471BV33-133AXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1471BV33-133AXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1471BV33-133AXC, NoBL™ series, Synchronous SRAM, 72Mbit, 2M x 36, 133 MHz, 6.5 ns, 3.135V-3.6V, 100-TQFP, Tray.","salesMarkdown":"## 72 Mbit synchronous SRAM — 133 MHz, 2M x 36, NoBL™ pipeline The CY7C1471BV33-133AXC is a 72 Mbit synchronous SRAM from Infineon's NoBL™ family, organized as 2M words by 36 bits. The 133 MHz clock rate and 6.5 ns access time mean the part can sustain back-to-back reads or writes without dead cycles — the NoBL™ pipeline eliminates the turnaround latency typical of conventional synchronous SRAMs. ## Supply voltage and temperature grade — what they mean for fit This part will not work on a 1.8 V or 2.5 V core supply without a level translator on the address and data lines. If the system sees ambient above 70 °C or below freezing, this part is out of spec — an industrial-temperature variant would be needed. ## Package and board integration — 100-TQFP (14x20 mm) Housed in a 100-lead TQFP (14x20 mm body), the part is surface-mount with a fine-pitch leadframe. The 0.5 mm pitch demands a controlled soldering profile and careful PCB layout to avoid bridging. The package is not moisture-sensitive per JEDEC Level 3, but a bake before reflow is recommended if the shelf life has been exceeded.","metaTitle":"Infineon CY7C1471BV33-133AXC 72Mbit SRAM, 133 MHz, 2M x 36","metaDescription":"Infineon CY7C1471BV33-133AXC 72Mbit synchronous SRAM, NoBL™ pipeline, 133 MHz clock, 6.5 ns access, 100-TQFP. Active production, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"6.5 ns","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Active","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1471","Memory Organization":"2M x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$128.6651","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/628924c755bdff75b315179b2f6927ff.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1471BV33-133AXC/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization and bus width of CY7C1471BV33-133AXC?","answer":"The part is organized as 2M words by 36 bits, giving a total of 72 Mbit. The 36-bit wide parallel interface includes 4 parity/ECC bits per word, which is useful for systems that need single-bit error correction on the fly."},{"question":"What is the NoBL™ series and how does it affect performance?","answer":"NoBL™ (No Bus Latency) is a pipelined synchronous SRAM architecture that eliminates the dead cycle between read and write operations. At 133 MHz, this means the memory controller can issue a write immediately after a read without waiting, improving throughput in high-bandwidth data paths."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1471BV33-133AXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1471BV33-133AXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}