{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1470BV25-200BZXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1470BV25-200BZXC","canonicalUrl":"https://icboms.com/infineon/CY7C1470BV25-200BZXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1470BV25-200BZXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies NoBL™ synchronous SRAM, CY7C1470BV25-200BZXC, 72 Mbit, 2M x 36 organization, 200 MHz clock, 3 ns access, 2.375V-2.625V, 165-LBGA, tray.","salesMarkdown":"The CY7C1470BV25-200BZXC is a 72 Mbit synchronous SRAM organized as 2M x 36, clocked at 200 MHz with a 3 ns access time. The NoBL (No Bus Latency) architecture means the data bus switches between read and write without an idle cycle — the next transaction starts on the clock edge after the current one completes, which keeps the bus at full throughput for back-to-back mixed accesses. The 2M x 36 organization suits processors or ASICs with a 36-bit data word or a wide memory bus that needs to pack parity or ECC into the same chip. The 200 MHz clock rate gives a 5 ns cycle time; the 3 ns access time means the data appears on the outputs within three nanoseconds of the clock edge, leaving 2 ns of the cycle for hold and setup at the controller. ## Package and board-fit — the 165-LBGA rework reality Supply voltage is 2.375V to 2.625V — a tight 2.5V nominal rail with 5% tolerance. The core and I/O share this single supply, so the board regulator must hold regulation within that band under load transients from the SRAM's simultaneous switching outputs. ## Obsolete — sourcing this part now The 165-LBGA footprint is specific enough that a board spin would be needed for any functional replacement.","metaTitle":"Infineon CY7C1470BV25-200BZXC 72Mbit NoBL SRAM, 200 MHz","metaDescription":"Infineon CY7C1470BV25-200BZXC 72Mbit synchronous SRAM, 200 MHz clock, 3 ns access, 2M x 36, 165-LBGA.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"3 ns","Memory Size":"72Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Obsolete","Clock Frequency":"200 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"2.375V ~ 2.625V","Base Product Number":"CY7C1470","Memory Organization":"2M x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"165-FBGA (15x17)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/c3cd87e7574098f3507d8a9164d1bf79.pdf","sourceUrl":null},"ai":{"faq":[{"question":"How can I check stock or request a quote for the CY7C1470BV25-200BZXC?","answer":"Submit an RFQ through the storefront. No stock-holding claim is made here."},{"question":"What is the NoBL architecture on this SRAM?","answer":"NoBL stands for No Bus Latency. It eliminates the dead cycle that conventional synchronous SRAMs insert when switching from a read to a write operation. The bus stays at full throughput for mixed read/write sequences, which matters for network processors and data buffers where the access pattern is unpredictable."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1470BV25-200BZXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1470BV25-200BZXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:10:32.187Z","lastPublished":"2026-07-21T02:10:32.187Z","indexable":true}}