{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1414AV18-250BZC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1414AV18-250BZC","canonicalUrl":"https://icboms.com/infineon/CY7C1414AV18-250BZC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1414AV18-250BZC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1414AV18-250BZC synchronous QDR-II SRAM, 36Mbit (1Mx36), 250 MHz clock, 1.7-1.9 V, 165-FBGA tray, 0°C to 70°C.","salesMarkdown":"## QDR-II SRAM at 250 MHz — the bandwidth ceiling The CY7C1414AV18-250BZC is a 36 Mbit synchronous QDR-II SRAM organized 1M×36, clocked at 250 MHz on a 1.7–1.9 V core supply. The QDR-II architecture delivers two data words per clock cycle on separate read and write ports — at 250 MHz the interface sustains 18 Gbit/s of simultaneous read-write bandwidth, which is the figure that drives the fit in high-throughput packet buffers and traffic managers. ## Obsolete — the sourcing reality for this part Infineon lists the CY7C1414AV18-250BZC as Obsolete. A board spin is required if migrating to a different QDR-II density or package variant. ## Package and thermal context for the 165-FBGA The 1.7–1.9 V rail is tight; the board design must keep VDD ripple below 50 mV at the BGA balls to avoid setup/hold timing violations at 250 MHz.","metaTitle":"Infineon CY7C1414AV18-250BZC QDR-II SRAM, 36Mbit, 250 MHz","metaDescription":"Infineon CY7C1414AV18-250BZC 36Mbit QDR-II SRAM, 1Mx36, 250 MHz clock. Obsolete — sourced to order against RFQ through independent distribution.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C1414AV18-250BZC","Package":"Tray","Technology":"SRAM - Synchronous, QDR II","Memory Size":"36Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Clock Frequency":"250 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1414","Memory Organization":"1M x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"165-FBGA (15x17)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/85f29a0dbf8171ed24144f319528c821.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization and clock speed of CY7C1414AV18-250BZC?","answer":"It is a 36 Mbit QDR-II SRAM organized 1M×36 with a 250 MHz clock. The dual-port architecture delivers two data words per cycle on separate read and write buses."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1414AV18-250BZC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1414AV18-250BZC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:08:09.357Z","lastPublished":"2026-07-21T02:08:09.357Z","indexable":true}}