{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C141-25JXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C141-25JXC","canonicalUrl":"https://icboms.com/infineon/CY7C141-25JXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C141-25JXC","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY7C141 series dual-port async SRAM, 8Kbit (1K×8), 25 ns access time, 4.5–5.5V supply, 52-PLCC (19.13×19.13mm) surface-mount package, commercial 0–70°C operating range, tube.","salesMarkdown":"## Dual-port async SRAM — 25 ns access, 1K×8 mailbox The Cypress CY7C141-25JXC is a dual-port asynchronous SRAM organized 1K x 8, providing 8 Kbit of shared memory accessible from two independent ports with separate address, data, and control lines. Supply range is 4.5 V to 5.5 V, and the part is specified for commercial temperature (0°C to 70°C). ## Obsolete — last-time-buy passed, surplus channel only The CY7C141-25JXC is officially obsolete. No last-time-buy window remains from Cypress (now Infineon). available via RFQ confirmation through independent distribution is date-code-limited and should be verified for authenticity and proper storage. In a dual-port system, both ports must arbitrate for the same memory array. ## 1K x 8 organization — sizing the shared buffer With 8 Kbit organized as 1K x 8, this part is a small mailbox or register file, not a bulk data buffer. Typical use cases include passing command/status words between two processors or storing a small look-up table accessible from both sides. The 25 ns write cycle time (word/page) matches the read access, so back-to-back writes at full speed are possible without extra dead cycles.","metaTitle":"Cypress CY7C141-25JXC Dual-Port Async SRAM, 25 ns, 8Kbit, 52-PLCC","metaDescription":"Cypress CY7C141-25JXC dual-port asynchronous SRAM, 8Kbit (1Kx8), 25 ns access time, 4.5-5.5V, 52-PLCC, 0-70°C. Obsolete — sourced to order. RFQ for current availability.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C141-25JXC","Package":"Tube","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"8Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"52-LCC (J-Lead)","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C141","Memory Organization":"1K x 8","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"52-PLCC (19.13x19.13)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/d878ac824e0a8c8926f101324750403e.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the replacement for CY7C141-25JXC?","answer":"No official successor is listed from Cypress/Infineon for the CY7C141-25JXC. A pin-compatible dual-port SRAM in 52-PLCC from another vendor may exist, but requires cross-referencing the footprint and timing. The part is sourced as-is through the surplus channel."},{"question":"What is the pinout of CY7C141-25JXC?","answer":"The CY7C141-25JXC uses a 52-PLCC (J-lead) package with a standard dual-port SRAM pinout: separate address, data, and control lines for Port A and Port B, plus chip enables and output enables per port. Refer to the datasheet for the pin assignment diagram."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C141-25JXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C141-25JXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}