{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1381KV33-133AXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1381KV33-133AXI","canonicalUrl":"https://icboms.com/infineon/CY7C1381KV33-133AXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1381KV33-133AXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1381KV33-133AXI synchronous SDR SRAM, 18 Mbit, 512K x 36 organization, 133 MHz clock, 6.5 ns access time, 3.135-3.6 V supply, 100-TQFP, industrial temperature, tray.","salesMarkdown":"## Memory density and bus width for the data buffer The CY7C1381KV33-133AXI packs 18 Mbit of synchronous SRAM organized as 512K words by 36 bits wide. That 36-bit data bus matches a 32-bit processor core plus parity or ECC nibble without needing a second chip — the extra four bits carry the check byte on the same bus cycle. ## Clock rate and access time — the read throughput ceiling Rated for a 133 MHz clock, the part delivers a 7.5 ns cycle time. The 6.5 ns access time from the clock edge means the data appears on the bus within that window — the controller must latch it before the next rising edge, so the board trace delay plus input setup time must fit inside the remaining 1.0 ns margin. At 133 MHz the 36-bit bus delivers a peak read bandwidth of roughly 598 MB/s (133 MHz × 4 bytes per word). The synchronous pipeline keeps the address bus free for the next access while the current read completes, which matters for back-to-back cache-line fills. ## Supply rail tolerance and temperature grade Operates from 3.135 V to 3.6 V — a 3.3 V nominal rail with ±5 % regulation stays inside this window. ## Package and board-fit for the 100-TQFP Supplied in a 100-lead TQFP with a 14 mm × 20 mm body (EIAJ standard). The 0.5 mm pitch demands a controlled-impedance stack-up on the fan-out layers — the inner rows of the 36-bit data bus need at least a four-layer board to avoid signal-integrity issues at 133 MHz. Surface-mount assembly with a tray carrier. The package is RoHS-compatible per Infineon's standard green molding compound; no moisture-sensitive level is stated, but a 24-hour bake at 125 °C before reflow is prudent if the tray seal is broken.","metaTitle":"Infineon CY7C1381KV33-133AXI SRAM, 18Mbit, 133 MHz, 100-TQFP","metaDescription":"Infineon CY7C1381KV33-133AXI 18Mbit synchronous SDR SRAM, 512K x 36, 133 MHz clock, 6.5 ns access, 3.135-3.6 V, industrial temp, 100-TQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C1381KV33-133AXI","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"6.5 ns","Memory Size":"18Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1381","Memory Organization":"512K x 36","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-TQFP (14x20)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$31.8325","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/448034a41a4bdebecbacbb9133f8ac7a.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1381KV33-133AXI/alternatives.json"},"ai":{"faq":[{"question":"How can I order the CY7C1381KV33-133AXI or request a price?","answer":"Submit an RFQ for a firm quote with lead time."},{"question":"What is the memory organization and interface of this SRAM?","answer":"It is a 512K x 36 synchronous SDR SRAM with a parallel interface. The 36-bit data bus supports 32-bit words plus a 4-bit parity or ECC nibble on the same chip."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1381KV33-133AXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1381KV33-133AXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}