{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1380DV33-200AXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1380DV33-200AXI","canonicalUrl":"https://icboms.com/infineon/CY7C1380DV33-200AXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1380DV33-200AXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1380DV33-200AXI synchronous SDR SRAM, 18Mbit, 512K x 36 organization, 200 MHz clock, 3 ns access time, 3.135V-3.6V supply, 100-LQFP Tray, -40°C to 85°C.","salesMarkdown":"## 200 MHz synchronous SRAM — 512K x 36 in 100-LQFP The CY7C1380DV33-200AXI is an 18 Mbit synchronous SRAM organized as 512K words by 36 bits, clocked at 200 MHz with a 3 ns access time from the clock edge. The laser etch and date-code consistency should be verified against Infineon's marking standards when sourcing from non-franchised stock — the 100-LQFP package is a common target for re-marked parts. ## Speed grade and timing margin The 200 MHz clock frequency and 3 ns access time define the read-to-data-valid window — at 200 MHz the clock period is 5 ns, so the 3 ns access leaves 2 ns for board trace delay and setup at the controller. This is a synchronous SDR (single data rate) architecture — data is captured on the rising clock edge only, which simplifies timing closure compared to DDR variants but halves the theoretical bandwidth per pin.","metaTitle":"CY7C1380DV33-200AXI 18Mbit Sync SRAM, 200 MHz, 3.3V","metaDescription":"Infineon CY7C1380DV33-200AXI 18Mbit synchronous SRAM, 512K x 36, 200 MHz clock, 3 ns access time, 3.135-3.6V, -40°C to 85°C.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C1380DV33-200AXI","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"3 ns","Memory Size":"18Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"200 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1380","Memory Organization":"512K x 36","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-TQFP (14x20)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$27.8300","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/08d25ac045babb294de999c699016b63.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1380DV33-200AXI/alternatives.json"},"ai":{"faq":[{"question":"Where can I buy CY7C1380DV33-200AXI?","answer":"This part is obsolete from Infineon."},{"question":"What is the memory organization and speed of CY7C1380DV33-200AXI?","answer":"It is 18 Mbit organized as 512K x 36 bits, with a 200 MHz clock and 3 ns access time."},{"question":"What package does CY7C1380DV33-200AXI use?","answer":"100-lead LQFP with a 14x20 mm body (supplier device package 100-TQFP), supplied in tray packaging."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1380DV33-200AXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1380DV33-200AXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:05:36.873Z","lastPublished":"2026-07-21T02:05:36.873Z","indexable":true}}