{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1372KVE33-167AXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1372KVE33-167AXI","canonicalUrl":"https://icboms.com/infineon/CY7C1372KVE33-167AXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1372KVE33-167AXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1372KVE33-167AXI, NoBL™ Synchronous SRAM, 18Mbit (1M x 18), 167 MHz clock, 3.4 ns access, 3.135V–3.6V, -40°C to 85°C, 100-TQFP (14x20 mm), Tray.","salesMarkdown":"## 18 Mbit NoBL synchronous SRAM for high-throughput data buffering It clocks at 167 MHz with a 3.4 ns access time, eliminating the dead cycle normally required when a read follows a write on a standard synchronous SRAM bus. ## 167 MHz clock and 3.4 ns access — timing closure for the bus At 167 MHz the cycle time is about 6 ns, and the 3.4 ns access time leaves roughly 2.6 ns of setup margin before the next clock edge — enough for most FPGA or ASIC interfaces running at this speed class, but the trace-length matching and board impedance need attention. The parallel memory interface means every address and data line is a separate trace; a 100-pin LQFP fanout on a four-layer board is manageable but the 14x20 mm body puts the pins close enough that micro-vias or fine-pitch routing may be needed if the controller sits more than 50 mm away. ## NoBL architecture — why it matters for throughput Standard synchronous SRAMs insert a dead cycle when the bus direction flips from write to read. The NoBL pipeline allows a read command on the clock edge immediately following a write, so the data bus never idles. For a system doing mixed read/write traffic — a packet buffer or a display frame store — this can improve sustained throughput by up to 50% versus a conventional pipelined SRAM at the same clock rate. The trade-off is a slightly more complex controller state machine that must assert the correct command on every rising edge. No separate VDDQ rail is needed — the I/O and core share the same supply, which simplifies power sequencing. ## Active lifecycle — no near-term LTB concern The base product number CY7C1372 covers multiple speed and temperature variants in the same 100-pin footprint, so if a future design needs a faster or wider part, the pinout stays compatible across the family.","metaTitle":"CY7C1372KVE33-167AXI Infineon 18Mbit NoBL SRAM, 167 MHz","metaDescription":"Infineon CY7C1372KVE33-167AXI 18Mbit synchronous SRAM, 167 MHz clock, 3.4 ns access, NoBL architecture, 1Mx18, -40 to 85°C, 100-TQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"3.4 ns","Memory Size":"18Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Active","Clock Frequency":"167 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1372","Memory Organization":"1M x 18","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$35.1400","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/8c34dd06a1999ca10efe2a9b1a86dab1.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1372KVE33-167AXI/alternatives.json"},"ai":{"faq":[{"question":"Can the CY7C1372KVE33-167AXI replace the CY7C1372KVE33-167AXC?","answer":"The CY7C1372KVE33-167AXI and CY7C1372KVE33-167AXC share the same base product number, density, speed grade, and package. The 'I' variant is a drop-in replacement for the 'C' variant in the same footprint, with wider temperature tolerance."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1372KVE33-167AXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1372KVE33-167AXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}