{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1372KV33-200AXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1372KV33-200AXC","canonicalUrl":"https://icboms.com/infineon/CY7C1372KV33-200AXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1372KV33-200AXC","rawCanonicalId":null},"summary":{"shortDescription":"Cypress NoBL™ series CY7C1372KV33-200AXC, 18 Mbit synchronous SRAM, 1M×18 organization, 200 MHz clock, 3 ns access time, 3.135–3.6 V supply, parallel interface, 100-LQFP, 0°C to 70°C operating temperature.","salesMarkdown":"## 18 Mbit synchronous SRAM for high-throughput buffer designs It clocks at 200 MHz with a 3 ns access time, running from a 3.135 V to 3.6 V supply. The parallel interface and 100-LQFP package (14×20 mm body) target networking buffers, DSP scratchpads, and telecom line-card applications where back-to-back throughput matters. A 3 ns access time at 200 MHz means the SRAM can deliver data within one clock cycle of the address being latched, assuming the pipeline depth is accounted for. In practice, this gives the controller a tight timing budget for setup and hold on the data bus — critical when the part is used in a high-speed cache or FIFO buffer where every nanosecond of margin affects system stability. ## NoBL architecture — no dead cycles The NoBL™ architecture switches between read and write operations on consecutive clock edges without idle cycles. This can increase throughput compared to conventional synchronous SRAM that inserts a turnaround cycle.","metaTitle":"Cypress CY7C1372KV33-200AXC 18Mbit SRAM, 200 MHz, 3 ns","metaDescription":"Cypress CY7C1372KV33-200AXC NoBL synchronous SRAM: 18Mbit, 200 MHz clock, 3 ns access, 3.135-3.6V, 100-LQFP, 0°C-70°C. Active lifecycle, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C1372KV33-200AXC","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"3 ns","Memory Size":"18Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"200 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1372","Memory Organization":"1M x 18","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"100-TQFP (14x20)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$36.0500","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/8c34dd06a1999ca10efe2a9b1a86dab1.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1372KV33-200AXC/alternatives.json"},"ai":{"faq":[{"question":"What is the access time of CY7C1372KV33-200AXC?","answer":"The access time is 3 ns at a 200 MHz clock frequency."},{"question":"What is the exact replacement for CY7C1372KV33-200AXC?","answer":"No official replacement has been announced; the part remains active. For a pin-compatible alternative within the same NoBL family, check the CY7C1372 base number variants with matching 100-LQFP footprint."},{"question":"What is CY7C1372KV33-200AXC's listed series?","answer":"The series is NoBL™ (No Bus Latency), a Cypress synchronous SRAM family."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1372KV33-200AXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1372KV33-200AXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}