{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1370D-167AXCB","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1370D-167AXCB","canonicalUrl":"https://icboms.com/infineon/CY7C1370D-167AXCB","factsUrl":"https://icboms.com/api/mcp/products/CY7C1370D-167AXCB","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies NoBL™ series CY7C1370D-167AXCB synchronous SRAM, 18Mbit, 512K x 36, 167 MHz clock, 3.4 ns access, 3.135V-3.6V, 0°C to 70°C, 100-TQFP.","salesMarkdown":"## Memory organization and bus width The CY7C1370D-167AXCB: Organised as 512K words by 36 bits — the 36-bit word width maps directly to a 32-bit data bus plus 4 parity/ECC bits per word, common in networking and telecom line-card buffers where single-bit error detection is handled in the data path. ## Clock speed and access timing The 3.4 ns access sets the minimum cycle time for the first read after a deselect or write-to-read turnaround. The 0.5 mm pitch requires a controlled-impedance PCB stack-up for the 36-bit data bus at 167 MHz; trace length matching within 50 mm is typical to keep skew below 0.5 ns.","metaTitle":"CY7C1370D-167AXCB Infineon 18Mbit NoBL SRAM, 167 MHz","metaDescription":"Infineon CY7C1370D-167AXCB 18Mbit synchronous SRAM, 512K x 36, 3.4 ns access, 167 MHz. Obsolete — sourced to order against RFQ through independent distribution.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Bag","Technology":"SRAM - Synchronous, SDR","Access Time":"3.4 ns","Memory Size":"18Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","Clock Frequency":"167 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1370","Memory Organization":"512K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$43.7000","priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1370D-167AXCB/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization of CY7C1370D-167AXCB?","answer":"512K words by 36 bits, for a total of 18 Mbit. The 36-bit word width supports a 32-bit data bus with 4 parity bits per word, commonly used in networking and telecom line-card applications."},{"question":"What package does CY7C1370D-167AXCB use?","answer":"100-lead LQFP (14x20 mm body, 0.5 mm pitch), also designated as 100-TQFP."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1370D-167AXCB","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1370D-167AXCB when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:04:08.105Z","lastPublished":"2026-07-21T02:04:08.105Z","indexable":true}}