{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C136A-55NXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C136A-55NXI","canonicalUrl":"https://icboms.com/infineon/CY7C136A-55NXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C136A-55NXI","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY7C136A-55NXI: 16Kbit (2Kx8) dual-port asynchronous SRAM, 55ns access time, 4.5-5.5V supply, parallel interface, surface-mount 52-BQFP, -40 to 85°C operating temperature, obsolete.","salesMarkdown":null,"metaTitle":"CY7C136A-55NXI 16Kbit Dual-Port SRAM 55ns","metaDescription":"CY7C136A-55NXI is a 16Kbit (2Kx8) dual-port asynchronous SRAM, 55ns access, 4.5-5.5V supply, -40 to 85°C, in a 52-BQFP package. Now obsolete — quoted to order on RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"55 ns","Memory Size":"16Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"52-BQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C136","Memory Organization":"2K x 8","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"52-PQFP (10x10)","Write Cycle Time - Word, Page":"55ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/90caa3e64aa3f42e05e64c643a800680.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What package does the CY7C136A-55NXI come in?","answer":"It ships in a Tray, surface-mount, in a 52-lead BQFP body (52-PQFP 10×10 mm footprint)."},{"question":"What technology does the CY7C136A-55NXI use?","answer":"It is a dual-port asynchronous SRAM — two independent ports allow simultaneous read/write from separate bus masters without bus arbitration."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C136A-55NXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C136A-55NXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T18:12:59.411Z","lastPublished":"2026-07-11T18:12:59.411Z","indexable":true}}