{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C136-55NXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C136-55NXC","canonicalUrl":"https://icboms.com/infineon/CY7C136-55NXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C136-55NXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C136-55NXC SRAM - Dual Port, Asynchronous, 16Kbit (2K x 8), 55 ns access, 4.5V~5.5V, 52-BQFP (52-PQFP), Tray.","salesMarkdown":"## What the 55 ns access time means for your bus timing The CY7C136-55NXC: In a shared-memory system where two processors or a processor and an FPGA arbitrate for the same address space, the 55 ns window sets the minimum cycle time for read/write operations — the bus master must hold address and control valid for at least that long before the data is guaranteed on the bus. The part is no longer supported for new designs and has no factory last-time-buy window remaining. Each lot is verified for date-code consistency, marking integrity, and package condition before shipment — the 52-PQFP (10x10 mm) footprint is visually inspected for bent leads or mold-compound damage that could indicate rework or mishandling. The part ships in a 52-BQFP (bumpered quad flat pack) with a 10x10 mm body. The surface-mount footprint uses a fine-pitch gull-wing lead form — the 0.65 mm typical lead pitch requires a solder-paste stencil with aperture reduction to avoid bridging during reflow.","metaTitle":"CY7C136-55NXC 16Kbit Dual-Port SRAM, 55 ns, 52-PQFP","metaDescription":"Infineon CY7C136-55NXC dual-port asynchronous SRAM, 16Kbit (2K x 8), 55 ns access, 4.5-5.5 V, 52-PQFP. Obsolete — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"55 ns","Memory Size":"16Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"52-BQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C136","Memory Organization":"2K x 8","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"52-PQFP (10x10)","Write Cycle Time - Word, Page":"55ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/26ac8dabccf54e936bcb24bb7144afcb.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Where can I buy CY7C136-55NXC and how do I get a price?","answer":"The CY7C136-55NXC is obsolete and sourced through independent distribution."},{"question":"What is CY7C136-55NXC's listed technology?","answer":"It is a dual-port asynchronous SRAM — volatile memory with a parallel interface. The dual-port architecture allows two independent devices to access the same memory array simultaneously through separate address and data buses."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C136-55NXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C136-55NXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:03:18.547Z","lastPublished":"2026-07-21T02:03:18.547Z","indexable":true}}