{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C136-25JXCT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C136-25JXCT","canonicalUrl":"https://icboms.com/infineon/CY7C136-25JXCT","factsUrl":"https://icboms.com/api/mcp/products/CY7C136-25JXCT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C136-25JXCT dual-port asynchronous SRAM, 16Kbit (2K x 8), 25 ns access time, 4.5V-5.5V supply, 52-PLCC, Tape & Reel.","salesMarkdown":"## Dual-port SRAM for shared-memory arbitration The CY7C136-25JXCT: With a 25 ns access time and matching 25 ns write cycle, it suits shared-memory designs where two processors or controllers exchange data without bus arbitration overhead — common in telecom line cards, industrial controllers, and multiprocessor systems. The 52-PLCC package (19.13 x 19.13 mm body) with J-lead contacts is a through-hole-reflow compatible footprint, suitable for socketed or soldered assembly on multilayer boards. Available through independent distribution on a quoted-to-order basis. For existing BOM lines, verify the mating half and supply rail before committing.","metaTitle":"Infineon CY7C136-25JXCT 16Kbit Dual-Port SRAM, 25 ns","metaDescription":"Obsolete 16Kbit dual-port asynchronous SRAM, 25 ns access, 4.5-5.5V, 52-PLCC. Sourced to order against RFQ through independent distribution.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tape & Reel (TR)","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"16Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"52-LCC (J-Lead)","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C136","Memory Organization":"2K x 8","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"52-PLCC (19.13x19.13)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/26ac8dabccf54e936bcb24bb7144afcb.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C136-25JXCT/alternatives.json"},"ai":{"faq":[{"question":"What is the memory size and organization of CY7C136-25JXCT?","answer":"16Kbit organized as 2K x 8 bits, dual-port asynchronous SRAM with a 25 ns access time."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C136-25JXCT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C136-25JXCT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:03:00.087Z","lastPublished":"2026-07-21T02:03:00.087Z","indexable":true}}