{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1355C-133BGXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1355C-133BGXC","canonicalUrl":"https://icboms.com/infineon/CY7C1355C-133BGXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1355C-133BGXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies NoBL™ SRAM, Synchronous SDR, 9Mbit (256K x 36), 133 MHz clock, 6.5 ns access, 3.135V–3.6V, 0°C–70°C, 119-PBGA (14x22 mm), Tray.","salesMarkdown":"## 133 MHz synchronous SRAM with zero-bus-latency pipeline The CY7C1355C-133BGXC is a 9Mbit synchronous SRAM organized as 256K x 36, clocked at 133 MHz with a 6.5 ns access time. It belongs to Infineon's NoBL (No Bus Latency) series, which eliminates the dead cycle between read and write operations — each clock edge can launch a new transaction regardless of the previous direction. The 36-bit data bus (32 data + 4 parity/byte-select) suits networking equipment that needs wide word access for packet buffer lookups or forwarding tables. The parallel interface keeps the bus simple — no serialization overhead, but the 119-ball BGA demands a controlled-impedance PCB layout with the supply decoupling close to the balls. Core supply is 3.135 V to 3.6 V, nominally 3.3 V. The 0.465 V tolerance covers a 5% regulated rail plus transient droop — a 3.3 V buck converter with ±2% setpoint keeps the SRAM inside its window without a separate LDO. This limits the part to indoor, temperature-controlled environments — telecom central office, server room, or lab equipment. ## Package and board-fit considerations The 119-ball count means the outer rows carry address and control signals; the inner array is mostly Vdd and Vss. A four-layer board with a solid ground plane under the BGA is the minimum for signal integrity at 133 MHz. ## Obsolete — sourcing through surplus channels Each lot is sourced and verified against the BOM quantity at RFQ — no stock-holding claim is made. The 119-BGA package and 3.3 V supply mean a board spin is required to use any alternative SRAM with a different footprint or voltage.","metaTitle":"Infineon CY7C1355C-133BGXC 9Mbit NoBL SRAM, 133 MHz","metaDescription":"CY7C1355C-133BGXC 9Mbit (256K x 36) synchronous SRAM, 133 MHz clock, 6.5 ns access, NoBL architecture.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"6.5 ns","Memory Size":"9Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"119-BGA","Product Status":"Obsolete","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1355","Memory Organization":"256K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"119-PBGA (14x22)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/3c6cabb148834b33323f901bc271483d.pdf","sourceUrl":null},"ai":{"faq":[],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1355C-133BGXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1355C-133BGXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:01:39.111Z","lastPublished":"2026-07-21T02:01:39.111Z","indexable":true}}