{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1354CV25-166AXCT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1354CV25-166AXCT","canonicalUrl":"https://icboms.com/infineon/CY7C1354CV25-166AXCT","factsUrl":"https://icboms.com/api/mcp/products/CY7C1354CV25-166AXCT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies NoBL™ series, CY7C1354CV25-166AXCT synchronous SRAM, 9Mbit (256K x 36), 166 MHz clock, 3.5 ns access, 2.5 V supply, 100-TQFP, Tape & Reel.","salesMarkdown":"## 166 MHz synchronous pipeline — what the clock and access time mean for your bus The CY7C1354CV25-166AXCT is a 9 Mbit synchronous SRAM from Infineon's NoBL™ (No Bus Latency) family, organized as 256K words by 36 bits. The 166 MHz clock drives a pipelined read/write architecture that eliminates the dead cycle between consecutive reads — the NoBL™ feature lets the next address be presented on the clock edge immediately after the previous read, so back-to-back reads sustain full bus throughput without wait states. The 3.5 ns access time is the time from clock edge to valid data at the output pins. At 166 MHz (6 ns period), the pipeline depth means the first read incurs a latency of two clocks, but subsequent reads deliver one data word per clock. This matters for high-bandwidth data paths like network packet buffers or DSP coefficient tables where the bus is the bottleneck, not the core. ## 2.5 V supply rail and 36-bit word width — board integration The 100-TQFP (14x20 mm) package has 0.5 mm pitch, so the board needs a 4-layer stack-up for clean fan-out of the 36 data lines plus address and control signals. The 36-bit word width matches a 32-bit data bus with 4 parity/ECC bits, or a 36-bit wide FIFO interface, without external byte-muxing logic. The commercial temperature range (0°C to 70°C) limits this part to indoor, controlled-environment equipment — telecom line cards, test instrumentation, or server DIMM buffers. It is not rated for industrial or automotive ambient conditions. ## Last Buy — what the lifecycle status means for procurement Infineon has placed the CY7C1354CV25-166AXCT in Last Buy status. This is the final ordering window before the part becomes permanently unavailable from the factory. For a BOM line that depends on this exact footprint and timing, the Last Buy window is the time to secure lifetime-buy inventory or qualify a replacement. Sourced through independent distribution against an RFQ; availability and pricing confirmed at quote time.","metaTitle":"CY7C1354CV25-166AXCT Infineon 9Mbit NoBL SRAM, 166 MHz","metaDescription":"Infineon CY7C1354CV25-166AXCT 9Mbit synchronous SRAM, 166 MHz, 3.5 ns access, 256Kx36, 100-TQFP. Last Buy — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Last Buy","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tape & Reel (TR)","Technology":"SRAM - Synchronous, SDR","Access Time":"3.5 ns","Memory Size":"9Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Last Time Buy","Clock Frequency":"166 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"2.375V ~ 2.625V","Base Product Number":"CY7C1354","Memory Organization":"256K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$10.8516","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/a7ef9613cd534ef644419074685578e6.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1354CV25-166AXCT/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization of the CY7C1354CV25-166AXCT?","answer":"It is organized as 256K words by 36 bits, for a total of 9 Mbit. The 36-bit word width is useful for 32-bit data buses with parity or for 36-bit wide FIFO interfaces."},{"question":"What supply voltage does the CY7C1354CV25-166AXCT require?","answer":"It requires a 2.5 V nominal supply, with a tolerance of 2.375 V to 2.625 V."},{"question":"What package does the CY7C1354CV25-166AXCT use?","answer":"It comes in a 100-lead TQFP (14x20 mm body, 0.5 mm pitch), supplied on Tape & Reel. The supplier device package is 100-TQFP."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1354CV25-166AXCT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1354CV25-166AXCT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:00:43.584Z","lastPublished":"2026-07-21T02:00:43.584Z","indexable":true}}