{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1354C-200AXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1354C-200AXC","canonicalUrl":"https://icboms.com/infineon/CY7C1354C-200AXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1354C-200AXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies NoBL™ SRAM, CY7C1354C-200AXC, 9Mbit synchronous SDR, 256K x 36 organization, 200 MHz clock, 3.2 ns access, 100-TQFP (14x20), tray.","salesMarkdown":"The CY7C1354C-200AXC is marked obsolete by Infineon. ## NoBL architecture and synchronous interface This is a 9 Mbit synchronous SRAM organized as 256K x 36, part of the NoBL™ (No Bus Latency) series. The NoBL pipeline eliminates the dead bus cycle between read and write operations — the controller can issue a write on the clock cycle immediately following a read without inserting an idle cycle, which matters for back-to-back throughput in cache or buffer applications. The parallel memory interface runs at a 200 MHz clock frequency, with a 3.2 ns access time from the clock edge. At this speed, the timing closure on the board depends on the trace length matching and the output load capacitance — the 3.2 ns spec is the datasheet maximum at the rated supply and temperature, not a typical number. ## Supply, temperature, and package fit The commercial temperature grade (0 °C to 70 °C) limits deployment to indoor, temperature-controlled environments; no industrial or automotive temperature range is offered on this variant. Packaged in a 100-TQFP (14x20 mm body, 0.5 mm pitch). The footprint matches the standard 100-pin LQFP/TQFP land pattern — the thermal pad on the underside should be connected to a ground plane for heat spreading, though the 9 Mbit density keeps the junction temperature well below the 70 °C ambient ceiling in normal airflow.","metaTitle":"Infineon CY7C1354C-200AXC 9Mbit SRAM, 200 MHz, 100-TQFP","metaDescription":"Obsolete 9Mbit NoBL™ synchronous SRAM, 256K x 36, 200 MHz clock, 3.2 ns access, 100-TQFP. Sourced to order against RFQ through independent distribution.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"3.2 ns","Memory Size":"9Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","Clock Frequency":"200 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1354","Memory Organization":"256K x 36","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$12.8800","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/8b89357562a3e91f046218f21ff35d82.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1354C-200AXC/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization and interface of CY7C1354C-200AXC?","answer":"It is a 9 Mbit synchronous SRAM organized 256K x 36 with a parallel interface and a 200 MHz clock. The NoBL architecture allows zero-latency read-to-write transitions."},{"question":"What package does CY7C1354C-200AXC use?","answer":"The base package is a 100-LQFP."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1354C-200AXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1354C-200AXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T02:00:41.438Z","lastPublished":"2026-07-21T02:00:41.438Z","indexable":true}}