{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1351G-100AXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1351G-100AXC","canonicalUrl":"https://icboms.com/infineon/CY7C1351G-100AXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1351G-100AXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1351G-100AXC, NoBL™ synchronous SRAM, 4.5 Mbit (128K x 36), 8 ns access time, 100 MHz clock, parallel interface, 3.135V–3.6V supply, 0°C–70°C, 100-TQFP (14x20).","salesMarkdown":"## NoBL synchronous SRAM for high-throughput cache and buffer applications Typical applications include network packet buffers, cache memory for processors, and high-speed data acquisition systems where sustained throughput matters. ## 100 MHz clock and 8 ns access — timing closure for the bus The 100 MHz clock frequency and 8 ns access time define the window for setup and hold on the data bus. With the NoBL pipeline, back-to-back reads and writes run at full clock rate without idle cycles, so the bus utilization hits the theoretical maximum for a single-data-rate synchronous SRAM. The 36-bit wide data path (128K x 36) matches 32-bit processor buses with parity or ECC bits, or two 18-bit devices in a wider memory array. ## Package and footprint — 100-TQFP (14x20) Housed in a 100-lead LQFP (also specified as 100-TQFP with 14x20 mm body), this is a surface-mount package with 0.5 mm pitch. The footprint is standard for high-density synchronous SRAMs of this generation. The supplier device package is 100-TQFP (14x20); verify the pin1 orientation against your layout — the LQFP and TQFP variants are the same mechanical outline. ## Lifecycle and supply — active, no LTB risk Infineon lists the CY7C1351G-100AXC as Active.","metaTitle":"Infineon CY7C1351G-100AXC NoBL SRAM, 4.5 Mbit, 100 MHz","metaDescription":"Infineon CY7C1351G-100AXC synchronous SRAM, 4.5 Mbit (128K x 36), 8 ns access, 100 MHz clock, 3.135V–3.6V, 100-TQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"NoBL™","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"8 ns","Memory Size":"4.5Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Active","Clock Frequency":"100 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.6V","Base Product Number":"CY7C1351","Memory Organization":"128K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$6.5806","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/8cd3c9961bfc50a45e7f661f2be9154f.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1351G-100AXC/alternatives.json"},"ai":{"faq":[{"question":"What is the difference between CY7C1351G-100AXC and CY7C1351B-100AXC?","answer":"The CY7C1351G-100AXC is the later revision of the CY7C1351B-100AXC. Both are 4.5 Mbit NoBL synchronous SRAMs with the same 100 MHz clock and 8 ns access time, in the same 100-TQFP package. The G revision incorporates process improvements for lower power or wider timing margins — check the respective datasheets for exact parametric differences. The parts are footprint- and function-compatible."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1351G-100AXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1351G-100AXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}