{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1347F-100AC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1347F-100AC","canonicalUrl":"https://icboms.com/infineon/CY7C1347F-100AC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1347F-100AC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1347F-100AC synchronous SRAM, 4.5Mbit organized 128K x 36, 4.5 ns access time, 100 MHz clock, 3.15V–3.6V supply, 100-TQFP (14x20 mm) package.","salesMarkdown":"## What this 128K x 36 synchronous SRAM delivers The CY7C1347F-100AC is a 4.5 Mbit synchronous SRAM from Infineon, organized as 128K words of 36 bits each — the extra 4 bits per word suit systems that need parity or ECC without external logic. It clocks at 100 MHz with a 4.5 ns access time, meaning the first word appears on the bus 4.5 ns after the address is latched; subsequent pipelined reads run at the full 100 MHz rate. If the board lives in an enclosure with no active cooling or sees outdoor air, this part is not the right fit; look for an industrial-temperature variant in the same family. Infineon lists the CY7C1347F-100AC as Active. Sourced through Infineon's authorized distribution network. ## Package and layout checklist The 100-TQFP (14x20 mm) has a 0.5 mm pitch — a 4-layer PCB is recommended for signal integrity at 100 MHz. The datasheet shows the recommended land pattern; keep the supply decoupling capacitors within 5 mm of each VDD/VDDQ pin pair. Supply pins are split between VDD (core, 3.3 V) and VDDQ (output buffer, 3.3 V). On the datasheet, both are tied to the same 3.15 V–3.6 V rail, but each pin group should have its own local 0.1 µF ceramic cap to keep switching noise off the core supply.","metaTitle":"CY7C1347F-100AC Infineon 4.5Mbit SRAM 100 MHz 4.5 ns","metaDescription":"CY7C1347F-100AC Infineon synchronous SRAM, 4.5Mbit, 128K x 36, 4.5 ns access, 100 MHz clock, 3.15V-3.6V, 100-TQFP, active production.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"4.5 ns","Memory Size":"4.5Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"100 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.15V ~ 3.6V","Base Product Number":"CY7C1347","Memory Organization":"128K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/87172cd594744477f72d5bce8884ae53.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization of CY7C1347F-100AC?","answer":"128K x 36 bits, giving a 36-bit wide data bus."},{"question":"What package does CY7C1347F-100AC come in?","answer":"100-TQFP (14x20 mm body), surface-mount."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1347F-100AC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1347F-100AC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}